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HMC8415LP6GETR Datasheet(PDF) 13 Page - Analog Devices

Part # HMC8415LP6GETR
Description  GaN Power Amplifier
PDF  23 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

HMC8415LP6GETR Datasheet(HTML) 13 Page - Analog Devices

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Data Sheet
HMC8415LP6GE
Rev. A | Page 13 of 23
0
20
40
60
80
100
120
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0
27.5
30.0
INPUT POWER (dBm)
9GHz
9.3GHz
9.5GHz
9.8GHz
10GHz
10.3GHz
10.5GHz
Figure 38. Power Dissipation vs. Input Power, Drain Bias Pulse Width = 100 µs
at 10% Duty Cycle
0
20
40
60
80
100
120
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0
27.5
30.0
INPUT POWER (dBm)
9GHz
9.3GHz
9.5GHz
9.8GHz
10GHz
10.3GHz
10.5GHz
Figure 39. Power Dissipation vs. Input Power, Drain Bias Pulse Width = 20 µs
at 2% Duty Cycle
0
20
40
60
80
100
120
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0
27.5
30.0
INPUT POWER (dBm)
9GHz
9.3GHz
9.5GHz
9.8GHz
10GHz
10.3GHz
10.5GHz
Figure 40. Power Dissipation vs. Input Power, Drain Bias Pulse Width = 50 µs
at 5% Duty Cycle
0
20
40
60
80
100
120
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0
27.5
30.0
INPUT POWER (dBm)
MAXIMUM PDISS AT 85°C
9GHz
9.3GHz
9.5GHz
9.8GHz
10GHz
10.3GHz
10.5GHz
Figure 41. Power Dissipation (PDISS) vs. Input Power, Drain Bias Pulse Width =
100 µs at 10% Duty Cycle, Base Temperature (TBASE) = 85°C
0
20
40
60
80
100
120
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0
27.5
30.0
INPUT POWER (dBm)
9GHz
9.3GHz
9.5GHz
9.8GHz
10GHz
10.3GHz
10.5GHz
Figure 42. Power Dissipation vs. Input Power, Drain Bias Pulse Width = 200 µs
at 20% Duty Cycle
–100
0
100
200
300
400
500
600
700
800
900
1000
1100
–3.00 –2.95 –2.90 –2.85 –2.80 –2.75 –2.70 –2.65 –2.60 –2.55
VGG (V)
Figure 43. IDQ vs. VGG (VGGxA/VGGxB), VDDxA/VDDxB = 28 V,
Representative of a Typical Device



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