MAX8713 datasheet(21/25 Pages) MAXIM

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higher than the losses at VDCIN(MAX), consider increas-

ing the size of M1. Conversely, if the losses at

VDCIN(MAX) are significantly higher than the losses at

VIN(MIN), consider reducing the size of M1. If DCIN

does not vary over a wide range, the minimum power

dissipation occurs where the resistive losses equal the

switching losses. Choose a low-side MOSFET that has

the lowest-possible on-resistance (RDS(ON)), comes in

a moderate-sized package (i.e., one or two 8-pin SO,

DPAK, or D2PAK), and is reasonably priced. Make sure

that the DLO gate driver can supply sufficient current to

support the gate charge and the current injected into

the parasitic gate-to-drain capacitor caused by the

high-side MOSFET turning on; otherwise, cross-con-

duction problems can occur. Select devices that have

short turn-off times, and make sure that M2(tDOFF(MAX))

- M1(tDON(MIN)) < 30ns, and M1(tDOFF(MAX)) -

M2(tDON(MIN)) < 30ns. Failure to do so may result in

efficiency-killing shoot-through currents.

MOSFET Power Dissipation

Worst-case conduction losses occur at the duty-factor

extremes. For the high-side MOSFET, the worst-case

power dissipation (PD) due to resistance occurs at the

minimum supply voltage:

Generally, a small high-side MOSFET is desired to

reduce switching losses at high input voltages.

However, the RDS(ON) required to stay within package

power-dissipation limits often limits how small the

MOSFET can be. The optimum occurs when the switch-

ing (AC) losses equal the conduction (RDS(ON)) losses.

Switching losses in the high-side MOSFET can become

an insidious heat problem when maximum AC adapter

voltages are applied, due to the squared term in the

CV2f switching-loss equation. If the high-side MOSFET

that was chosen for adequate RDS(ON) at low supply

voltages becomes extraordinarily hot when subjected

to VIN(MAX), then choose a MOSFET with lower losses.

Calculating the power dissipation in M1 due to switch-

ing losses is difficult since it must allow for difficult

quantifying factors that influence the turn-on and turn-

off times. These factors include the internal gate resis-

tance, gate charge, threshold voltage, source

inductance, and PC board layout characteristics. The

following switching-loss calculation provides only a

very rough estimate and is no substitute for breadboard

evaluation, preferably including a verification using a

thermocouple mounted on M1:

where CRSS is the reverse transfer capacitance of M1,

and IGATE is the peak gate-drive source/sink current

(0.7A sourcing and 2.5A sinking).

For the low-side MOSFET (M2), the worst-case power

dissipation always occurs at maximum input voltage:

(LOW-SIDE)

BATT

DCIN

LOAD

DS(ON)



































 ×

PD(HS_SWITCHING)

DCIN(MAX)

RSS

LOAD

GATE

××

(HIGH-SIDE)

BATT

DCIN

LOAD

DS(ON)























 ×

Simplified Multichemistry

SMBus Battery Charger

______________________________________________________________________________________

FREQUENCY (Hz)

100k

10k

-10

-20

-45

-90

100

MAGNITUDE

PHASE

Figure 12. CCI Loop Response

BATTERY VOLTAGE (V)

0.05

0.10

0.15

0.20

0.25

0.30

0.35

0.40

012

VADAPTER = 12V

Figure 13. Ripple Current vs. Battery Voltage

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