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HD64F2145 Datasheet(PDF) 452 Page - Renesas Technology Corp |
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HD64F2145 Datasheet(HTML) 452 Page - Renesas Technology Corp |
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452 / 829 page  Rev. 2.0, 08/02, page 412 of 788 Table 16.5 Flags and Transfer States (Slave Mode) MST TRS BBSY ESTP STOP IRTR AASX AL AAS ADZ ACKB ICDRF ICDRE State 0 000 00 000 00— 0Idle state (flag clearing required) 00 1 ↑ 00 00 ↓ 00 00— 1 ↑ Start condition detected 01 ↑/0 * 1 10 00 0— 1 ↑ 001 ↑ 1 SAR match in first frame (SARX ≠SAR) 0 010 00 0— 1 ↑ 1 ↑ 01 ↑ 1 General call address match in first frame (SARX ≠H’00) 01 ↑/0 * 1 10 01 ↑ 1 ↑ — 0 001 ↑ 1 SARS match in first frame (SAR ≠SARX) 0 110 0— — — — 01 ↑ — — Transmission end (ACKE=1 and ACKB=1) 0 110 01 ↑/0 * 1 ——— 0 0 — 1 ↑ Transmission end with ICDRE=0 0 110 0— — 0 ↓ 0 ↓ 00— 0 ↓ ICDR write with the above state 0 110 0— — — — 10 1Transmission end with ICDRE=1 0 110 0— — 0 ↓ 0 ↓ 00 0 ↓ ICDR write with the above state 0 110 01 ↑/0 * 2 —0 0 0 0 1 ↑ Automatic data transfer from ICDRT to ICDRS with the above state 0 010 01 ↑/0 * 2 ——— ——1 ↑ — Reception end with ICDRF=0 0 010 0— — 0 ↓ 0 ↓ 0 ↓ —0 ↓ — ICDR read with the above state |
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