HD64F2145 datasheet(448/829 Pages) RENESAS

448 / 829 page

Rev. 2.0, 08/02, page 408 of 788

Bit

Bit Name

Initial Value R/W

Description

IRIC

R/W

Clocked synchronous serial format and formatless modes:

• At the end of data transfer (rise of the 8th

transmit/receive clock with serial format selected and

rise of the 9th transmit/receive clock with formatless

selected)

• When a start condition is detected with serial format

selected

• When the SW bit in DDCSWR is set to 1

When the ICDRE or ICDRF flag is set to 1 in any operating

mode:

• When a start condition is detected in transmit mode

(when a start condition is detected in transmit mode

and the ICDRE flag is set to 1)

• When data is transferred among the ICDR register and

buffer (when data is transferred from ICDRT to ICDRS

in transmit mode and the ICDRE flag is set to 1, or

when data is transferred from ICDRS to ICDRR in

receive mode and the ICDRF flag is set to 1)

[Clearing conditions]

• When 0 is written in IRIC after reading IRIC = 1

• When ICDR is read from or written to by the DTC (This

may not function as a clearing condition depending on

the situation. For details, see the description of the DTC

operation given below.)

Note: * Only 0 can be written, to clear the flag.

HD64F2145 Datasheet(PDF) 448 Page - Renesas Technology Corp