HD64F2145 datasheet(449/829 Pages) RENESAS

449 / 829 page

Rev. 2.0, 08/02, page 409 of 788

When the DTC is used, IRIC is cleared automatically and transfer can be performed continuously

without CPU intervention.

When, with the I

2C bus format selected, IRIC is set to 1 and an interrupt is generated, other flags

must be checked in order to identify the source that set IRIC to 1. Although each source has a

corresponding flag, caution is needed at the end of a transfer.

When the ICDRE or ICDRF flag is set, the IRTR flag may or may not be set. The IRTR flag (the

DTC start request flag) is not set at the end of a data transfer up to detection of a retransmission

start condition or stop condition after a slave address (SVA) or general call address match in I

bus format slave mode.

Even when the IRIC flag and IRTR flag are set, the ICDRE or ICDRF flag may not be set. The

IRIC and IRTR flags are not cleared at the end of the specified number of transfers in continuous

transfer using the DTC. The ICDRE or ICDRF flag is cleared, however, since the specified

number of ICDR reads or writes have been completed.

Tables 16.4 and 16.5 show the relationship between the flags and the transfer states.

HD64F2145 Datasheet(PDF) 449 Page - Renesas Technology Corp