4

Proprietary to OmniVision Technologies

Version 1.7, December 3, 2004

OV9650

Pin Description

NOTE:

D[9:2] for 8-bit YUV or RGB565/RGB555 (D[9] MSB, D[2] LSB)

D[9:0] for 10-bit Raw RGB data (D[9] MSB, D[0] LSB)

Table 1

Pin Description

Pin Location

Name

Pin Type

Function/Description

A1

PWDN

Function

(default = 0)

Power Down Mode Selection - active high, internal pull-down resistor.

0: Normal mode

1: Power down mode

A2

AVDD

Power

A3

SIO_D

I/O

SCCB serial interface data I/O

A4

D2

Output

Output bit[2] - LSB for 8-bit YUV or RGB565/RGB555

A5

D4

Output

Output bit[4]

B1

VREF

Internal voltage reference - connect to ground through 1µF capacitor

B2

NVDD

Voltage reference

B3

AGND

Power

Analog ground

B4

SIO_C

Input

SCCB serial interface clock input

B5

D3

Output

Output bit[3]

C1

D0

Output

Output bit[0] - LSB for 10-bit Raw RGB data only

C2

DVDD

Power

C4

NC

—

No connection

C5

D5

Output

Output bit[5]

D1

D1

Output

Output bit[1] - for 10-bit RGB only

D2

VSYNC

Output

Vertical sync output

D4

NC

—

No connection

D5

NC

—

No connection

E1

HREF

Output

HREF output

E2

DOVDD

Power

E3

RESET

Function

(default = 0)

Clears all registers and resets them to their default values. Active high, internal

pull-down resistor.

E4

D8

Output

Output bit[8]

E5

D6

Output

Output bit[6]

F1

PCLK

Output

Pixel clock output

F2

XVCLK1

Input

System clock input

F3

DOGND

Power

Digital ground

F4

D9

Output

Output bit[9] - MSB for 10-bit Raw RGB data and 8-bit YUV or RGB565/RGB555

F5

D7

Output

Output bit[7]