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ARM7 Datasheet(PDF) 31 Page - NXP Semiconductors

Part # ARM7
Description  Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC
PDF  38 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

ARM7 Datasheet(HTML) 31 Page - NXP Semiconductors

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9397 750 14985
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 01 — 3 October 2005
31 of 38
Philips Semiconductors
LPC2141/42/44/46/48
Single-chip 16-bit/32-bit microcontrollers
9.
Dynamic characteristics
[1]
Characterized but not implemented as production test. Guaranteed by design.
[1]
Parameters are valid over operating temperature range unless otherwise specified.
[2]
Typical ratings are not guaranteed. The values listed are at room temperature (+25 ˚C), nominal supply voltages.
[3]
Bus capacitance Cb in pF, from 10 pF to 400 pF.
Table 7:
Dynamic characteristics of USB pins (full-speed)
CL = 50 pF; Rpu = 1.5 kΩ on D+ to VDD,unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tr
rise time
10 % to 90 %
4
-
20
ns
tf
fall time
10 % to 90 %
4
-
20
ns
tFRFM
differential rise and fall time
matching
(tr/tf)
90
-
110
%
VCRS
output signal crossover voltage
1.3
-
2.0
V
tFEOPT
source SE0 interval of EOP
see Figure 9
160
-
175
ns
tFDEOP
source jitter for differential transition
to SE0 transition
see Figure 9
−2
-
+5
ns
tJR1
receiver jitter to next transition
−18.5
-
+18.5
ns
tJR2
receiver jitter for paired transitions
10 % to 90 %
−9
-
+9
ns
tEOPR1
EOP width at receiver [1]
must reject as
EOP; see
Figure 9
40
--ns
tEOPR2
EOP width at receiver [1]
must accept as
EOP; see
Figure 9
82
--ns
Table 8:
Dynamic characteristics
Ta = −40 °C to +85 °C for commercial applications, VDD over specified ranges [1]
Symbol
Parameter
Conditions
Min
Typ [2]
Max
Unit
External clock
fosc
oscillator frequency
10
-
25
MHz
Tcy(CLK)
clock cycle time
40
-
100
ns
tCHCX
clock HIGH time
Tcy(CLK) × 0.4
-
-
ns
tCLCX
clock LOW time
Tcy(CLK) × 0.4
-
-
ns
tCLCH
clock rise time
-
-
5
ns
tCHCL
clock fall time
-
-
5
ns
Port pins (P0.2, P0.3, P0.11, and P0.14)
tr(o)
output rise time
-
10
-
ns
tf(o)
output fall time
-
10
-
ns
I2C-bus pins (P0.2, P0.3, P0.11, and P0.14)
tf(o)
output fall time
VIH to VIL
20 + 0.1
× Cb [3] --ns



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