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SAF-C161PI Datasheet(PDF) 79 Page - Infineon Technologies AG

Part # SAF-C161PI
Description  16-Bit Single-Chip Microcontroller
PDF  400 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

SAF-C161PI Datasheet(HTML) 79 Page - Infineon Technologies AG

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User’s Manual
4-31
1999-08
The Multiply/Divide High Register MDH
This register is a part of the 32-bit multiply/divide register, which is implicitly used by the
CPU, when it performs a multiplication or a division. After a multiplication, this non-bit
addressable register represents the high order 16 bits of the 32-bit result. For long
divisions, the MDH register must be loaded with the high order 16 bits of the 32-bit
dividend before the division is started. After any division, register MDH represents the
16-bit remainder.
Whenever this register is updated via software, the Multiply/Divide Register In Use
(MDRIU) flag in the Multiply/Divide Control register (MDC) is set to ’1’.
When a multiplication or division is interrupted before its completion and when a new
multiply or divide operation is to be performed within the interrupt service routine, register
MDH must be saved along with registers MDL and MDC to avoid erroneous results.
A detailed description of how to use the MDH register for programming multiply and
divide algorithms can be found in chapter “System Programming”.
MDH
Multiply/Divide High Reg.
SFR (FE0C
H/06H)
Reset value: 0000
H
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
mdh
rwh
Bit
Function
mdh
Specifies the high order 16 bits of the 32-bit multiply and divide reg. MD.



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