S8233C datasheet(12/26 Pages) SII

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BATTERY PROTECTION IC FOR 3-SERIAL-CELL PACK

S-8233C Series

Rev.4.0_00

Seiko Instruments Inc.

Description

Remark Refer to “

Battery Protection IC Connection Example”.

Normal condition

This IC monitors the voltages of the three serially-connected batteries and the discharge current to control

charging and discharging. If the voltages of all the three batteries are in the range from the over

discharge detection voltage (VDD) to the over charge detection voltage (VCU), and the current flowing

through the batteries becomes equal or lower than a specified value (the VMP terminal voltage is equal or

lower than over current detection voltage 1), the charging and discharging FETs turn on. In this condition,

charging and discharging can be carried out freely. This condition is called the normal condition. In this

condition, output voltage of CSO,ISO and DSO go ‘low’. VCC terminals are shorted by the RVCM resistor.

Over current condition

This IC is provided with the three over current detection levels (VIOV1,VIOV2 and VIOV3) and the three over

current detection delay time (tIOV1,tIOV2 and tIOV3) corresponding to each over current detection level.

If the discharging current becomes equal to or higher than a specified value (the VMP terminal voltage is

equal to or higher than the over current detection voltage) during discharging under normal condition and

it continues for the over current detection delay time (tIOV) or longer, the discharging FET turns off to stop

discharging. This condition is called an over current condition. The VMP and VCC terminals are shorted

by the RVCM resistor at this time. The charging FET turns off.

When the discharging FET is off and a load is connected, the VMP terminal voltage equals the VSS

potential. In this condition, output voltage of ISO goes ‘High’.

The over current condition returns to the normal condition when the load is released and the impedance

between the EB- and EB+ terminals (see Figure 8 for a connection example) is 100 M

Ω or higher. When

the load is released, the VMP terminal, which and the VCC terminal are shorted with the RVCM resistor,

goes back to the VCC potential. The IC detects that the VMP terminal potential returns to over current

detection voltage 1 (VIOV1) or lower (or the over current detection voltage 2 (VIOV2) or lower if the COVT

terminal is fixed at the 'L' level and over current detection 1 is inhibited) and returns to the normal

condition. At that time, output voltage of ISO goes ‘Low’.

Over charge condition

If one of the battery voltages becomes higher than the over charge detection voltage (VCU) during

charging under normal condition and it continues for the over charge detection delay time (tCU) or longer,

the charging FET turns off to stop charging. This condition is called the over charge condition. The 'H'

level signal is output to the conditioning terminal corresponding to the battery which exceeds the over

charge detection voltage until the battery becomes equal to lower than the over charge release voltage

(VCD). In this condition, output voltage of CSO is ‘High’. The VMP and VCC terminals are shorted by the

RVCM resistor under the over charge condition.

The over charge condition is released in two cases. The output voltage of CSO terminal changes to ‘L’

when the over charge condition is released.

1) The battery voltage which exceeded the over charge detection voltage (VCU) falls below the over

charge release voltage (VCD), the charging FET turns on and the normal condition returns.

2) If the battery voltage which exceeded the over charge detection voltage (VCU) is equal or higher than

the over charge release voltage (VCD), but the charger is removed, a load is placed, and discharging

starts, the charging FET turns on and the normal condition returns.

The release mechanism is as follows: the discharge current flows through an internal parasitic diode of

the charging FET immediately after a load is installed and discharging starts, and the VMP terminal

voltage decreases by about 0.6 V from the VCC terminal voltage momentarily. The IC detects this

voltage (over current detection voltage 1 or higher), releases the over charge condition and returns to the

normal condition.

S8233C Datasheet(PDF) 12 Page - Seiko Instruments Inc

S8233C Datasheet(HTML) 12 Page - Seiko Instruments Inc

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