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OPA810

SBOS799A – AUGUST 2019 – REVISED DECEMBER 2019

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10 Power Supply Recommendations

The OPA810 is intended for operation on supplies ranging from 4.75 V to 27 V. The OPA810 can be operated on

single-sided supplies, split and balanced bipolar supplies, or unbalanced bipolar supplies. Operating from a

single supply can have numerous advantages. With the negative supply at ground, the DC errors resulting from

the –PSRR term can be minimized. Typically, AC performance improves slightly at 10-V operation with minimal

increase in supply current. Minimize the distance (< 0.1") from the power-supply pins to high-frequency, 0.01-µF

decoupling capacitors. A larger capacitor (2.2 µF typical) is used along with a high-frequency, 0.01-µF, supply-

decoupling capacitor at the device supply pins. For single-supply operation, only the positive supply has these

capacitors. When a split supply is used, use these capacitors from each supply to ground. If necessary, place the

larger capacitors further from the device and share these capacitors among several devices in the same area of

the printed circuit board (PCB). An optional supply decoupling capacitor across the two power supplies (for split-

supply operation) reduces second harmonic distortion.

11 Layout

11.1 Layout Guidelines

Achieving optimum performance with a high-frequency amplifier such as the OPA810 requires careful attention to

board layout parasitics and external component types. The OPA2810EVM can be used as a reference when

designing the circuit board. Recommendations that optimize performance include:

1. Minimize parasitic capacitance to any AC ground for all signal I/O pins. Parasitic capacitance on the output

and inverting input pins can cause instability—on the noninverting input, this capacitance can react with the

source impedance to cause unintentional band-limiting. To reduce unwanted capacitance, open a window

around the signal I/O pins in all ground and power planes around those pins. Otherwise, ground and power

planes must be unbroken elsewhere on the board.

2. Minimize the distance (< 0.1") from the power-supply pins to high-frequency, 0.01-µF decoupling

capacitors. At the device pins, do not allow the ground and power plane layout to be in close proximity to the

signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and the

decoupling capacitors. The power-supply connections must always be decoupled with these capacitors.

Larger (2.2-µF to 6.8-µF) decoupling capacitors, effective at lower frequency, must also be used on the

supply pins. These capacitors can be placed somewhat farther from the device and shared among several

devices in the same area of the PC board.

3. Careful selection and placement of external components preserve the high-frequency performance of

the OPA810. Resistors must be a low reactance type. Surface-mount resistors work best and allow a tighter

overall layout. Metal film and carbon composition axially leaded resistors can also provide good high-

frequency performance. Again, keep their leads and PCB trace length as short as possible. Never use

wirewound type resistors in a high-frequency application. Because the output pin and inverting input pin are

the most sensitive to parasitic capacitance, always position the feedback and series output resistor, if any, as

close as possible to the output pin. Other network components, such as noninverting input termination

resistors, must also be placed close to the package. Even with a low parasitic capacitance shunting the

external resistors, excessively high resistor values can create significant time constants that can degrade

performance. Good axial metal film or surface-mount resistors have approximately 0.2 pF in shunt with the

resistor. For resistor values greater than 10 kΩ, this parasitic capacitance can add a pole or zero close to the

GBWP of 70 MHz and subsequently affects circuit operation. Keep resistor values as low as possible and

consistent with load driving considerations. Lowering the resistor values keeps the resistor noise terms low,

and minimizes the effect of parasitic capacitance, however lower resistor values increase the dynamic power

consumption because RF and RG become part of the amplifiers output load network. Transimpedance

applications (see the Transimpedance Amplifier section) can use whatever feedback resistor is required by

the application as long as the feedback compensation capacitor is set considering all parasitic capacitance

terms on the inverting node.

4. Connections to other wideband devices on the board can be made with short direct traces or through

onboard transmission lines. For short connections, consider the trace and the input to the next device as a

lumped capacitive load. Relatively wide traces (50 mils to 100 mils) must be used, preferably with ground

and power planes opened up around them. Estimate the total capacitive load and set RS for sufficient phase

margin and stability. Low parasitic capacitive loads (< 10 pF) may not need an RS because the OPA810 is

nominally compensated to operate with a 10-pF parasitic load. Higher parasitic capacitive loads without an

RS are allowed with increase in signal gain (increasing the unloaded phase margin). If a long trace is

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