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CS61581 Datasheet(PDF) 25 Page - Cirrus Logic |
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CS61581 Datasheet(HTML) 25 Page - Cirrus Logic |
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25 / 37 page ![]() CS61581 DS211PP8 25 27 mV/LSB. All voltages are peak voltages across the TTIP and TRING outputs. On the secondary of a 1:2 step-up transformer, the mV/LSB is twice the values stated above. Note that although the full scale digital input is 3F, it is rec- ommended that full scale output voltage on the transformer primary be limited to 2.4 V peak. At higher output voltages, the driver may not drive the requested output voltage. Writing the arbitrary waveform RAM requires a deviation from normal serial port access. Register 0x13 is the RAM address register for the arbitrary waveform. Two consecutive address bytes are writ- ten; first the Address/Command Byte is written to address 0x13, followed by the address in RAM to be written. This dual address is then followed by the data byte for the waveform amplitude. There are 42 RAM byte locations (numbered 0x00 to 0x29). Each phase amplitude is written as an eight- bit byte, where the first phase of the symbol is writ- ten first. The amplitude bytes are written LSB first. Reading the Arbitrary Waveform RAM follows the same sequence as the write, except the third mem- ory access in the sequence is a read instead of a write. 4.1 Power On Reset / Reset Upon power-up, the IC is held in a static state until the supply crosses a threshold of approximately 3 Volts. When this threshold is crossed, the device will delay for about 10 ms to allow the power sup- ply to reach operating voltage. After this delay, cal- ibration of the transmit and receive sections commences. Because power up conditions can vary considerably, it is recommended that the device be reset after the power supply has stabilized to ensure a known initial operational condition. The internal frequency generators can be calibrated only if a reference clock is present. The reference clock for the transmitter is provided by TCLK. The reference for the receiver is either the crystal oscil- lator or MCLK. If both the oscillator and MCLK are active, MCLK will be used as the reference source. The initial calibration should take less than 20 ms after pulses are input to the receiver. In operation, the device is continuously calibrated, making the performance of the device independent of power supply or temperature variations. The continuous calibration function forgoes any re- quirement to reset the line interface when in opera- tion. However, a reset function is available which will reinitiate calibration and clear all registers and clear the Network Loopback function. In Host Mode, a reset is initiated by simultaneously writing RLOOP and LLOOP to the register. The re- set will set all registers to “0” and initiate a calibra- tion. A reset will also set LOS high in the Short Haul configuration. In Hardware Mode, the CS61581 is reset by simul- taneously setting RLOOP and LLOOP high for at least 200 ns. Hardware reset will clear Network Loopback functionality Figure 14. Example of Summing of Waveforms CS61581 DS211F1 25 |
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