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SC33690DS Datasheet(PDF) 11 Page - NXP Semiconductors |
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SC33690DS Datasheet(HTML) 11 Page - NXP Semiconductors |
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11 / 26 page ![]() Standalone Configuration with One-Wire Bus MC33690 Standalone Tag Reader Circuit, Rev. 5 Freescale Semiconductor 11 Figure 6. Mode Access Description in One-Wire Bus Configuration Figure 7. Configuration A State Diagram 7.1 Timing Definitions for a 8 MHz Crystal The timing definitions for a 8 MHz crystal are: •Tref is crystal oscillator period (125 ns typ.) •T0=8064.Tref = 1.008ms typ. •T0’=7932.Tref = 0.992ms typ. •T1=16256.Tref = 2.032ms typ. •T1’=16128.Tref = 2.016ms typ. •T2=4096.Tref, = 512µs typ. T0 is the minimum time required to guarantee the device toggles from read to write (or from write to read). However, the STARC may toggle from read to write (or from write to read) between T0 and T0’. T1 is the minimum time required to guarantee the device toggles from write to standby. However, the STARC may toggle in standby between T1 and T1’. K line T0 £ t < T0’+T1’ 1 0 0 0 1 1 read mode write mode K line t ŠT0 read mode write mode K line t Š T1 standby mode write mode Read to write mode: Write to read mode: Write to standby mode: Standby mode to read mode: standby mode read mode wake-up sequence K line acknowledge T2 T2 Read write TD1/2 Write TD1/2 off Standby T0 £ K line low K line high < T0’ T1 £ K line low T0 £ K line high Wake-up K line low Reset K switching |
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