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TMS320VC5502 Datasheet(PDF) 39 Page - Texas Instruments |
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TMS320VC5502 Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 195 page  3.3.2 Host Port Mux TMS320VC5502 Fixed-Point Digital Signal Processor www.ti.com SPRS166K – APRIL 2001 – REVISED NOVEMBER 2008 Table 3-4. TMS320VC5502 Routing of Parallel Port Mux Signals PARALLEL/HOST PORT MUX MODE = 0 PARALLEL/HOST PORT MUX MODE = 1 PIN (HPI NON-MULTIPLEX) (FULL EMIF) Address Bus A[17:2] HPI.HA[15:0] EMIF.A[17:2] A[21:18] PGPIO[3:0] EMIF.A[21:18] Data Bus D[15:0] HPI.HD[15:0] EMIF.D[15:0] D[31:16] PGPIO[19:4] EMIF.D[31:16] Control Bus C0 PGPIO20 EMIF.ARE/SADS/SDCAS/SRE C1 PGPIO21 EMIF.AOE/SOE/SDRAS C2 PGPIO22 EMIF.AWE/SWE/SDWE C3 PGPIO23 EMIF.ARDY C4 PGPIO24 EMIF.CE0 C5 PGPIO25 EMIF.CE1 C6 PGPIO26 EMIF.CE2 C7 PGPIO27 EMIF.CE3 C8 PGPIO28 EMIF.BE0 C9 PGPIO29 EMIF.BE1 C10 PGPIO30 EMIF.BE2 C11 PGPIO31 EMIF.BE3 C12 PGPIO32 EMIF.SDCKE C13 PGPIO33 EMIF.SOE3 C14 PGPIO34 EMIF.HOLD C15 PGPIO35 EMIF.HOLDA The 5502 Host Port Mux controls the function of 8 data signals (pins HD[7:0]) and 2 control signals (pins HC0 and HC1). The Host Port Mux supports two different modes: • 8-bit multiplexed mode: The HPI's 8 data and 2 control signals are routed to their corresponding pins on the Host Port Mux. • Parallel general-purpose I/O mode: All pins on the Host Port Mux are routed to PGPIO. The HPI is enabled to 16-bit (non-multiplexed) mode, but communicates through the Parallel Port Mux. The mode of the Host Port Mux is determined by the state of the GPIO6 pin at reset. If GPIO6 is low, the pins of the Host Port Mux will be set to PGPIO. The HPI will still be enabled, but it will communicate through the Parallel Port Mux. The Parallel/Host Port Mux Mode bit of the External Bus Control Register will be set to 0 to reflect the PGPIO mode of the Host Port Mux. If GPIO6 is high, the HPI will be enabled in 8-bit (multiplexed) mode: pins HD[7:0] are set to HPI.HD[7:0], and HC0 and HC1 are set to HPI.HAS and HPI.HBIL, respectively. The Parallel/Host Port Mux Mode bit field in the XBSR will be set to 1 to reflect the HPI multiplexed mode of the Host Port Mux. See Section 3.8, Host-Port Interface (HPI), for more information on the operation of the HPI in multiplexed and non-multiplexed modes. Table 3-5 lists the individual routing of the HPI and PGPIO signals to the Host Port Mux pins. Submit Documentation Feedback Functional Overview 39 |
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