VSC7511 datasheet(169/324 Pages) MICROSEMI

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Functional Descriptions

VMDS-10488 VSC7511 Datasheet Revision 4.2

154

3.17

Hardware Time Stamping

Hardware time stamping provides nanosecond-accurate frame arrival and departure time stamps, which

are used to obtain high precision timing synchronization and timing distribution.

All frames are Rx time stamped on arrival with a 48-bit time stamp value using a hardware timer (time

stamper) that is implemented in the Media Access Control (MAC) block. The Rx time stamper provides

high time stamp accuracy relative to actual arrival time of the first byte of the frame from the PHY device.

Within the VCAP IS2, it is decided if the frame and associated Rx time stamp must be redirected or

copied to CPU for processing. The frame is forwarded as normal otherwise.

The VCAP IS2 also decides if a Tx time stamp must be triggered for a frame. Given the Rx and Tx time

stamps, the frame’s residence time inside the switch is calculated. The residence time can be stored in a

time stamp queue for the CPU to access (two-step time stamping) or the residence time can be used to

update the residence time field inside Precision Time Protocol frames (one-step time stamping).

The Tx time stamper is located at the transmit side of the MAC block as close to the PHY device as

possible and provides high accuracy of time stamp relative to when the first byte of the frame is actually

transmitted to the PHY.

The device also implements a time of day counter with nanosecond-accuracy. The time of day counter is

derived from a one-second timer. The one-second timer generates a pulse per second and is either

derived from an adjusted system clock or from external timing equipment.

3.17.1

Time Stamp Classification

Frames requiring Rx or Tx time stamping are identified by VCAP IS2. The IS2 action that triggers time

stamping is REW_OP[2:0], with the following options:

•

One-step time stamping (REW_OP[2:0] = 2), which implies adding the frame’s residence time to the

correction field.

•

Two-step time stamping (REW_OP[2:0] = 3), which implies saving the frame’s Tx time in a time

stamp queue.

•

Origin time stamping (REW_OP[2:0] = 5), which implies writing the time of day into the origintime

stamp field.

IS2 can be configured to identify the following frame formats from IEEE 1588-2008:

•

Transport of PTP over UDP over IPv4

•

Transport of PTP over UDP over IPv6

Transport of PTP over IEEE 802.3/Ethernet

3.17.2

Time of Day Generation

The DEVCPU has connection to four GPIOs to be used for 1588 synchronization shown in the following

illustration.

VSC7511 Datasheet(PDF) 169 Page - Microsemi Corporation

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