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VSC7511 Datasheet(PDF) 173 Page - Microsemi Corporation |
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VSC7511 Datasheet(HTML) 173 Page - Microsemi Corporation |
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173 / 324 page ![]() Functional Descriptions VMDS-10488 VSC7511 Datasheet Revision 4.2 158 reset is released, the strapping pins are used for other functions. For more information about which GPIO pins are used for strapping, see GPIO Overlaid Functions, page 204. By using resistors to pull the GPIOs either low or high, software can use these GPIO pins for other functions after reset has been released. For more information about overlaid functions on the GPIOs, see GPIO Overlaid Functions, page 204. Undefined configurations are reserved and cannot be used. VCore-III configurations that enable a front port or the PCIe endpoint drive VCore_CFG[3:2] high when the front port or PCIe endpoint is ready to use. Table 128 • Strapping Pin Description REFCLK_CONF[2:0] Configuration of reference clock frequency for PLL. 000: 125 MHz 001: 156.25 MHz 010: 250 MHz 100: 25 MHz Other values are reserved and must not be used. VCORE_CFG[3:0] Configuration of VCore system startup conditions. |
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