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S5000VSA Datasheet(PDF) 60 Page - Intel Corporation |
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S5000VSA Datasheet(HTML) 60 Page - Intel Corporation |
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60 / 86 page ![]() Design and Environmental Specifications Intel® Server Board S5000VSA TPS Revision 1.4 Intel order number – D36978-006 60 Figure 15. Output Voltage Timing Table 33. Turn On / Off Timing Item Description Minimum Maximum Units Tsb_on_delay Delay from AC being applied to 5VSB being within regulation. 1000 msec Tac_on_delay Delay from AC being applied to all output voltages being within regulation. 2500 msec Tvout_holdup Time all output voltages stay within regulation after loss of AC. 21 msec Tpwok_holdup Delay from loss of AC to de-assertion of PWOK 20 msec Tpson_on_delay Delay from PSON # active to output voltages within regulation limits. 5 400 msec Tpson_pwok Delay from PSON # de-active to PWOK being de-asserted. 50 msec Tpwok_on Delay from output voltages within regulation limits to PWOK asserted at turn on. 100 1000 msec Tpwok_off Delay from PWOK de-asserted to output voltages (3.3V, 5V, 12V, -12V) dropping out of regulation limits. 1 msec Tpwok_low Duration of PWOK being in the de-asserted state during an off/on cycle using AC or the PSON signal. 100 msec Tsb_vout Delay from 5VSB being in regulation to O/Ps being in regulation at AC turn on. 50 1000 msec T5VSB_holdup Time the 5VSB output voltage stays within regulation after loss of AC. 70 msec Vout 10% Vout Tvout rise Tvout_on Tvout_off V1 V2 V3 V4 |
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