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Data Sheet | Intel Enpirion Power Solutions: EM2130

Page 32

The EM2130 supports the LINEAR data format according to the PMBus specification. Note that in

accordance with the PMBus specification, all commands related to the output voltage are subject to the

VOUT_MODE settings.

A detailed description of the supported PMBus commands supported by the EM2130 can be found in

EM21xx Application Note – PMBus Commands Guide.

TIMING AND BUS SPECIFICATION

tBUF

tHD:STA

tLOW

tHD:DAT

tHIGH

tSU:DAT

tSU:STO

tSU:STA

SCL

SDA

Figure 15: PMBus Timing Diagram

Table 15: EM2130 PMBus Parameters

Parameter

Symbol

Conditions

Min

Typ

Max

Units

PMBus operation frequency

fSMB

100

400

kHz

Bus free time between start and

stop

tBUF

1.3

μs

Hold time after start condition

tHD:STA

0.6

μs

Repeat start condition setup time

tSU:STA

0.6

μs

Stop condition setup time

tSU:STO

0.6

μs

Data hold time

tHD:DAT

300

Data setup time

tSU:DAT

150*

Clock low time-out

tTIMEOUT

Clock low period

tLOW

1.3

μs

Clock high period

tHIGH

0.6

μs

Cumulative clock low extend time

tLOW:SEXT

Clock or data fall time

300

Clock or data rise time

300

Note: The EM2130 fully complies with PMBus 1.2 specifications for operation up to 100kHz on SCL. The

EM2130 may be operated at frequencies up to at least 400kHz on SCL if tSU:DAT is maintained greater than

150ns.

ADDRESS SELECTION VIA EXTERNAL RESISTORS

The PMBus protocol uses a 7-bit device address to identify different devices connected to the bus. This

address can be selected via external resistors connected to the ADDRx pins.

The resistor values are sensed using the internal ADC during the initialization phase and the appropriate

PMBus address is selected. Note that the respective circuitry is only active during the initialization phase;

hence no DC voltage can be measured at the pins. The supported PMBus addresses and the values of the

respective required resistors are listed in Table 15.

12873

April 10, 2020

Rev I

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