PMS150C datasheet(13/67 Pages) PADAUK

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PMS150C

8 bit IO-Type Controller

Page 13 of 67

PDK-DS-PMS150C-EN-V004 – Jan. 24, 2018

Symbol

Description

Min

Typ

Max

Unit

Conditions

tSBP

System boot-up period from

power-on (Fast boot up)

780

@ VDD =5V

@ VDD =2.5V

System boot-up period from

power-on (Slow boot up)

@ VDD =5V

@ VDD =2.5V

tWUP

Wake-up time for fast wake-up

(misc.5=1)

TILRC

Where TILRC is the clock

period of ILRC

Wake-up time for normal wake-up

(misc.5=0)

2048

TILRC

Where TILRC is the clock

period of ILRC

tRST

External reset pulse width

120

@ VDD =5V

CPos

Comparator offset*

±10

±20

CPcm

Comparator input common mode*

VDD+1.5

CPspt

Comparator response time*

100

500

Both Rising and Falling

CPmc

Stable time to change comparator

mode

2.5

7.5

CPcs

Comparator current consumption

VDD = 3.3V

*These parameters are for design reference, not tested for every chip.

4.2. Absolute Maximum Ratings



Supply Voltage ……………………………......

2.0V ~ 5.5V (Maximum Rating: 5.5V)

*If VDD over maximum rating, it may lead to a permanent damage of IC.



Input Voltage …………………………………..

-0.3V ~ VDD + 0.3V



Operating Temperature ………………………

-20°C ~ 70°C



Storage Temperature …………………………

-50°C ~ 125°C



Junction Temperature ………………………..

150°C

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