PMS150C datasheet(37/67 Pages) PADAUK

37 / 67 page

PMS150C

8 bit IO-Type Controller

Page 37 of 67

PDK-DS-PMS150C-EN-V004 – Jan. 24, 2018

5.9. Interrupt

There are four interrupt lines for PMS150C:



External interrupt PA0



GPC interrupt



Timer16 interrupt



Timer2 interrupt

Every interrupt request line has its own corresponding interrupt control bit to enable or disable it; the hardware

diagram of interrupt function is shown as Fig. 12. All the interrupt request flags are set by hardware and

cleared by writing intrq register. When the request flags are set, it can be rising edge, falling edge or both,

depending on the setting of register integs. All the interrupt request lines are also controlled by engint

instruction (enable global interrupt) to enable interrupt operation and disgint instruction (disable global

interrupt) to disable it. The stack memory for interrupt is shared with data memory and its address is specified

by stack register sp. Since the program counter is 16 bits width, the bit 0 of stack register sp should be kept 0.

Moreover, user can use pushaf / popaf instructions to store or restore the values of ACC and flag register to

/ from stack memory.

Since the stack memory is shared with data memory, the stack position and level are arranged by the

compiler in Mini-C project. When defining the stack level in ASM project, users should arrange their locations

carefully to prevent address conflicts.

Fig. 12: Hardware diagram of Interrupt controller

PMS150C Datasheet(PDF) 37 Page - PADAUK Technology.