8 Detailed Description

8.1 Overview

The TMUX1208-Q1 is an 8:1, single-ended (1-channel), mux. Each channel is turned on or off based on the

state of the address lines and enable pin.

8.2 Functional Block Diagram

TMUX120 8-Q1

A0

A1

A2

EN

S1

D

S2

S3

S4

S5

S6

S7

S8

1-OF-8

DECODER

8.3 Feature Description

8.3.1 Bidirectional Operation

The TMUX1208-Q1 conducts equally well from source (Sx) to drain (D) or from drain (D) to source (Sx). Each

channel has very similar characteristics in both directions and supports both analog and digital signals.

8.3.2 Rail to Rail Operation

8.3.3 1.8 V Logic Compatible Inputs

The TMUX1208-Q1 has 1.8-V logic compatible control for all logic control inputs. The logic input thresholds scale

with supply but still provide 1.8-V logic control when operating at 5.5 V supply voltage. 1.8-V logic level inputs

allows the multiplexers to interface with processors that have lower logic I/O rails and eliminates the need for an

external translator, which saves both space and BOM cost. For more information on 1.8 V logic implementations

refer to Simplifying Design with 1.8 V logic Muxes and Switches

8.3.4 Fail-Safe Logic

The TMUX1208-Q1 has Fail-Safe Logic on the control input pins (EN, A0. A1, A2) allowing for operation up to

5.5 V, regardless of the state of the supply pin. This feature allows voltages on the control pins to be applied

before the supply pin, protecting the device from potential damage. Fail-Safe Logic minimizes system complexity

by removing the need for power supply sequencing on the logic control pins. For example, the Fail-Safe Logic

logic level of another device up to 5.5 V.

TMUX1208-Q1

SCDS415A – AUGUST 2019 – REVISED JULY 2020

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