FT232RL datasheet(14/40 Pages) FTDI

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FT232R USB UART IC Datasheet

Version 2.16

Document No.: FT_000053 Clearance No.: FTDI# 38

FIFO TX Buffer (256 bytes). Data from the UART receive register is stored in the TX buffer. The USB

host controller removes data from the FIFO TX Buffer by sending a USB request for data from the device

data IN endpoint. (Tx relative to the USB interface).

UART FIFO Controller. The UART FIFO controller handles the transfer of data between the FIFO RX and

TX buffers and the UART transmit and receive registers.

UART Controller with Programmable Signal Inversion and High Drive. Together with the UART

FIFO Controller the UART Controller handles the transfer of data between the FIFO RX and FIFO TX

buffers and the UART transmit and receive registers. It performs asynchronous 7 or 8 bit parallel to serial

and serial to parallel conversion of the data on the RS232 (or RS422 or RS485) interface.

Control signals supported by UART mode include RTS, CTS, DSR, DTR, DCD and RI. The UART Controller

also provides a transmitter enable control signal pin option (TXDEN) to assist with interfacing to RS485

transceivers. RTS/CTS, DSR/DTR and XON / XOFF handshaking options are also supported. Handshaking

is handled in hardware to ensure fast response times. The UART interface also supports the RS232

BREAK setting and detection conditions.

Additionally, the UART signals can each be individually inverted and have a configurable high drive

strength capability. Both these features are configurable in the EEPROM.

Baud Rate Generator - The Baud Rate Generator provides a 16x clock input to the UART Controller

from the 48MHz reference clock. It consists of a 14 bit pre-scaler and 3 register bits which provide fine

tuning of the baud rate (used to divide by a number plus a fraction or “sub-integer”). This determines the

baud rate of the UART, which is programmable from 183 baud to 3 Mbaud.

The FT232R supports all standard baud rates and non-standard baud rates from 183 Baud up to 3

Mbaud. Achievable non-standard baud rates are calculated as follows -

Baud Rate = 3000000 / (n + x)

Where ‘n’ can be any integer between 2 and 16,384 ( = 214 ) and ‘x’ can be a sub-integer of the value 0,

0.125, 0.25, 0.375, 0.5, 0.625, 0.75, or 0.875. When n = 1, x = 0, i.e. baud rate divisors with values

between 1 and 2 are not possible.

This gives achievable baud rates in the range 183.1 baud to 3,000,000 baud. When a non-standard baud

rate is required simply pass the required baud rate value to the driver as normal, and the FTDI driver will

calculate the required divisor, and set the baud rate. See FTDI application note AN232B-05 on the FTDI

website (www.ftdichip.com) for more details.

RESET Generator - The integrated Reset Generator Cell provides a reliable power-on reset to the device

internal circuitry at power up. The RESET# input pin allows an external device to reset the FT232R.

RESET# can be tied to VCC or left unconnected if not being used.

FT232RL Datasheet(PDF) 14 Page - Future Technology Devices International Ltd.