U6809B datasheet(8/16 Pages) ATMEL

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U6809B

4764A–AUTO–10/03

Watchdog Window

Calculation

Example with recommended values

osc = 3.3 nF

(should be preferably 10%, NPO)

osc = 39 kW (may be 5%, Rosc < 100 kW due to leakage current and humidity)

RC Oscillator

WDC (s) = 10

-3

´ [C

osc (nF) ´ [(0.00078 ´ Rosc (kW)) + 0.0005]]

WDC (Hz) = 1/(tWDC)

Watchdog WDI

fWDI (Hz) = 0.01 ´ fWDC

tWDC = 100 µs -> fWDC = 10 kHz

fWDI = 100 Hz -> tWDI = 10 ms

WDI Pulse Width for Fault

Detection After 3 Pulses

Upper watchdog window

Minimum: 169/f

WDC = 16.9 ms -> fWDC/169 = 59.1 Hz

Maximum: 170/ f

WDC = 17.0 ms -> fWDC/170 = 58.8 Hz

Lower watchdog window

Minimum: 79/f

WDC = 7.9 ms -> fWDC/79 = 126.6 Hz

Maximum: 80/f

WDC = 8.0 ms -> fWDC/80 = 125.0 Hz

WDI Dropouts for Immediate

Fault Detection

Minimum: 250/f

WDC = 25 ms

Maximum: 251/f

WDC = 25.1 ms

Remark to Reset Delay

The duration of the over- or undervoltage pulses determines the enable and reset out-

put. A pulse duration shorter than the debounce time has no effect on the outputs. A

pulse longer than the debounce time results in the first reset delay. If a pulse appears

during this delay, a 2nd delay time is triggered. Therefore, the total reset delay time can

be longer than specified in the datasheet.

Figure 6. Watchdog Timing Diagram with Tolerances

Time/s

79/f

WDC

80/f

WDC

169/f

WDC

170/f

WDC

250/f

WDC

251/f

WDC

Watchdog

window update

rate is good

Update rate is

too fast

Update rate is

either too fast or

good

Update rate is

either too slow

or good

Update rate is

too slow

Update rate is

either too slow

or pulse has

dropped out

Pulse has

dropped out

U6809B Datasheet(PDF) 8 Page - ATMEL Corporation

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