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LMK04832W/EM Datasheet(PDF) 92 Page - Texas Instruments

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Part # LMK04832W/EM
Description  LMK04832-SP Space Grade Ultra-Low-Noise JESD204B Dual-Loop Clock Jitter Cleaner
PDF  99 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LMK04832W/EM Datasheet(HTML) 92 Page - Texas Instruments

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11.2 Layout Example
CLKouts/OSCouts - Differential signals should
be routed tightly coupled to minimize PCB
crosstalk.
For LVPECL/LCPECL/CML place components
resistors close to IC.
OSCout shares pins with CLKin2 and is
programmable for input or output.
For CLKout Vccs in JESD204B application,
Place the ferrite beads then a 1-µF capacitor.
The 1-µF capacitor supports low-frequency
SYSREF switching/turning on.
For CLKout Vccs in traditional applications,
place a ferrite bead on top layer close to pins
to choke high-frequency noise from the via.
CLKin and OSCin - If differential input
(preferred) route traces tightly coupled. If single
ended, have at least 3-trace width (of CLKin/
OSCin trace) separation from other RF traces.
Place terminations close to IC. CLKin2 and
OSCout share pins and are programmable
for input or output.
Charge pump output - shorter traces are
better. Place all resistors and caps close to
the IC.
Figure 11-1. Top Layer
LMK04832-SP
SNAS698A – MARCH 2017 – REVISED AUGUST 2020
www.ti.com
92
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Copyright © 2020 Texas Instruments Incorporated
Product Folder Links: LMK04832-SP



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