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PFS173 Datasheet(PDF) 3 Page - PADAUK Technology. |
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PFS173 Datasheet(HTML) 3 Page - PADAUK Technology. |
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3 / 105 page ![]() PFS173 8bit MTP MCU with 8-bit ADC ©Copyright 2020, PADAUK Technology Co. Ltd Page 3 of 105 PDK-DS-PFS173-EN_V105-Jun. 19, 2020 Table of content 1. Features ................................................................................................................................. 8 1.1. Special Features .....................................................................................................................8 1.2. System Features.....................................................................................................................8 1.3. CPU Features .........................................................................................................................8 1.4. Package Information ...............................................................................................................8 2. General Description and Block Diagram ............................................................................ 9 3. Pin Assignment and Description ...................................................................................... 10 4. Device Characteristics ....................................................................................................... 18 4.1. AC/DC Device Characteristics ..............................................................................................18 4.2. Absolute Maximum Ratings...................................................................................................20 4.3. Typical ILRC frequency vs. VDD ...........................................................................................20 4.4. Typical IHRC frequency deviation vs. VDD (calibrated to 16MHz).........................................21 4.5. Typical ILRC Frequency vs. Temperature .............................................................................21 4.6. Typical IHRC Frequency vs. Temperature (calibrated to 16MHz)..........................................22 4.7. Typical operating current vs. VDD @ system clock = ILRC/n ................................................22 4.8. Typical operating current vs. VDD @ system clock = IHRC/n ...............................................23 4.9. Typical operating current vs. VDD @ system clock = 4MHz EOSC / n ..................................23 4.10. Typical operating current vs. VDD @ system clock = 32KHz EOSC / n.................................24 4.11. Typical operating current vs. VDD @ system clock = 1MHz EOSC / n ..................................24 4.12. Typical IO driving current (IOH) and sink current (IOL) .............................................................25 4.13. Typical IO input high/low threshold voltage (VIH/VIL) ..............................................................27 4.14. Typical resistance of IO pull high/low device .........................................................................27 4.15. Typical power down current (IPD) and power save current (IPS)..............................................29 5. Functional Description....................................................................................................... 30 5.1. Program Memory - MTP........................................................................................................30 5.2. Boot Procedure .....................................................................................................................30 5.2.1. Timing charts for reset conditions ..............................................................................31 5.3. Data Memory - SRAM ...........................................................................................................32 5.4. Oscillator and clock ...............................................................................................................32 5.4.1. Internal High RC oscillator and Internal Low RC oscillator .........................................32 5.4.2. Chip calibration..........................................................................................................32 5.4.3. IHRC Frequency Calibration and System Clock ........................................................33 5.4.4. External Crystal Oscillator .........................................................................................34 5.4.5. System Clock and LVR level .....................................................................................36 |
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