4

Communication interface characteristics

4.1

SPI - serial peripheral interface

Subject to general operating conditions for Vdd and Top.

Symbol

Parameter

Value(1)

Unit

Min

Max

SPI clock cycle

100

ns

SPI clock frequency

10

MHz

CS setup time

5

ns

CS hold time

20

SDI input setup time

5

SDI input hold time

15

SDO valid output time

35

SDO output hold time

5

SDO output disable time

50

1. Values are guaranteed at 10 MHz clock frequency for SPI 4 wires, based on characterization results, not tested in

production

Note:

Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both input and output ports.

The SPI state machine is reset each time the CS signal is de-asserted.

IIS3DHHC

Communication interface characteristics

DS12292 - Rev 3

page 7/30