5

FIFO

The IIS3DHHC embeds 32 slots of 16-bit data FIFO for each of the accelerometer’s three output channels, X, Y

and Z. This allows consistent power saving for the system since the host processor does not need to continuously

poll data from the sensor, but it can wake up only when needed and burst the significant data out from the FIFO.

This buffer can work accordingly to five different modes: Bypass mode, FIFO mode, Continuous mode,

Continuous-to-FIFO mode and Bypass-to-Continuous mode. Each mode is selected by the FMODE [2:0] bits in

the FIFO_CTRL (2Eh) register. Programmable FIFO threshold status, FIFO overrun events and the number of

unread samples stored are available in the FIFO_SRC (2Fh) register and can be set to generate dedicated

interrupts on the INT1 and INT2 pins using the INT1_CTRL (21h) and INT2_CTRL (22h) registers.

FIFO_SRC (2Fh)(FTH) goes to '1' when the number of unread samples (FIFO_SRC (2Fh) (FSS5:0)) is greater

than or equal to FTH [4:0] in FIFO_CTRL (2Eh). If FIFO_CTRL (2Eh) (FTH[4:0]) is equal to 0, FIFO_SRC (2Fh)

(FTH) goes to ‘0’.

FIFO_SRC (2Fh)(OVRN) is equal to '1' if a FIFO slot is overwritten.

FIFO_SRC (2Fh)(FSS [5:0]) contains stored data levels of unread samples. When FSS [5:0] is equal to ‘000000’,

FIFO is empty. When FSS [5:0] is equal to ‘100000’, FIFO is full and the unread samples are 32.

The FIFO feature is enabled by writing '1' in CTRL_REG4 (23h) (FIFO_EN).

To guarantee the correct acquisition of data during the switching into and out of FIFO mode, the first sample

acquired must be discarded.

5.1

Bypass mode

In Bypass mode (FIFO_CTRL (2Eh)(FMODE [2:0]= 000), the FIFO is not operational, no data is collected in FIFO

memory, and it remains empty with the only actual sample available in the output registers.

Bypass mode is also used to reset the FIFO when in FIFO mode.

As described in Figure 9. Bypass mode, for each channel only the first address is used. When new data is

available the old data is overwritten.

y

empty

IIS3DHHC

FIFO

DS12292 - Rev 3

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