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ISO1640 Datasheet(PDF) 11 Page - Texas Instruments |
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ISO1640 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 28 page ![]() over recommended operating conditions, unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 4.5 V ≤ VCC1, VCC2 ≤ 5.5 V tf1 Output signal fall time (SDA1 and SCL1) 0.7 × VCC1 ≥ VO ≥ 0.3 × VCC1, R1 = 1430 Ω, C1 = 40 pF, R2 = 95.3 Ω, C2 = 400 pF, see Test Diagram 6 16 22 ns 0.9 × VCC1 ≥ VO ≥ 900 mV, R1 = 1430 Ω, C1 = 40 pF, see Test Diagram 13 32 48 tf2 Output signal fall time (SDA2 and SCL2) 0.7 × VCC2 ≥ VO ≥ 0.3 × VCC2, R2 = 143 Ω, C2 = 400 pF, see Test Diagram 10 24 30 ns 0.9 × VCC2 ≥ VO ≥ 400 mV, R2 = 143 Ω, C2 = 400 pF, see Test Diagram 28 48 76 tpLH1-2 Low-to-high propagation delay, side 1 to side 2 VI = 535 mV, VO = 0.7 × VCC2, R1 = 1430 Ω, R2 = 143 Ω, C1 and C2 = 10 pF, see Test Diagram 21 28 ns tpHL1-2 High-to-low propagation delay, side 1 to side 2 VI = 550 mV, VO = 0.3 × VCC2, R1 = 1430 Ω, R2 = 143 Ω, C1 and C2 = 10 pF, see Test Diagram 51 70 ns tpLH2-1 Low-to-high propagation delay, side 2 to side 1(1) VI = 0.4 x VCC2, VO = 0.7 x VCC1, R1 = 1430 Ω, R2 = 143 Ω, C1 and C2 = 10 pF, see Test Diagram 51 57 ns tpHL2-1 High-to-low propagation delay, side 2 to side 1(1) VI = 0.4 x VCC2, VO = 0.3 × VCC1, R1 = 1430 Ω, R2 = 143 Ω, C1 and C2 = 10 pF, see Test Diagram 60 88 ns PWD1-2 Pulse width distortion |tpHL1-2 – tpLH1-2| R1 = 1430 Ω, R2 = 143 Ω, C1 and C2 = 10 pF, see Test Diagram 30 45 ns PWD2-1 Pulse width distortion(1) |tpHL2-1 – tpLH2-1| R1 = 1430 Ω, R2 = 143 Ω, C1 and C2 = 10 pF, see Test Diagram 10 34 ns tLOOP1 Round-trip propagation delay on side 1(1) 0.4 V ≤ VI ≤ 0.3 × VCCI, R1 = 1430 Ω, C1 = 40 pF, R2 = 143 Ω, C2 = 400 pF, see Test Diagram 84 96 ns (1) This parameter does not apply to the SCL1 line of the ISO1641 device because it is unidirectional. www.ti.com ISO1640-Q1 SLLSFC3 – OCTOBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: ISO1640-Q1 |
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