ADSP-21486KSWZ-2AB datasheet(3/71 Pages) AD

3 / 71 page

ADSP-21483/ADSP-21486/ADSP-21487/ADSP-21488/ADSP-21489

Rev. H

Page 3 of 71

February 2020

GENERAL DESCRIPTION

The ADSP-2148x SHARC® processors are members of the

SIMD SHARC family of DSPs that feature Analog Devices’

Super Harvard Architecture. The processors are source code

compatible with the ADSP-2126x, ADSP-2136x, ADSP-2137x,

ADSP-2146x, ADSP-2147x and ADSP-2116x DSPs, as well as

with first generation ADSP-2106x SHARC processors in SISD

(single-instruction, single-data) mode. The ADSP-2148x pro-

cessors are 32-bit/40-bit floating point processors optimized for

high performance audio applications with large on-chip SRAM,

multiple internal buses to eliminate I/O bottlenecks, and an

innovative digital applications interface (DAI).

Table 1 shows performance benchmarks for the ADSP-2148x

processors. Table 2 shows the features of the individual product

offerings.

Table 1. Processor Benchmarks

Benchmark Algorithm

Speed

(at 400 MHz)

Speed

(at 450 MHz)

1024 Point Complex FFT

(Radix 4, with Reversal)

23 μs

20.44 μs

FIR Filter (per Tap)1

1.25 ns

1.1 ns

IIR Filter (per Biquad)1

5 ns

4.43 ns

Matrix Multiply (Pipelined)

[3 × 3] × [3 × 1]

[4 × 4] × [4 × 1]

11.25 ns

20 ns

10.0 ns

17.78 ns

Divide (y/×)

7.5 ns

6.67 ns

Inverse Square Root

11.25 ns

10.0 ns

1 Assumes two files in multichannel SIMD mode

Table 2. ADSP-2148x Family Features

Feature

ADSP-21483

ADSP-21486

ADSP-21487

ADSP-21488

ADSP-21489

Maximum Instruction Rate

400 MHz

450 MHz

400 MHz

450 MHz

RAM

3 Mbits

5 Mbits

2/3 Mbits1

5 Mbits

ROM

4 Mbits

Audio Decoders in ROM2

Yes

Pulse-Width Modulation

4 Units (3 Units on 100-Lead Packages)

DTCP Hardware Accelerator

Contact Analog Devices

External Port Interface (SDRAM, AMI)3

Yes (16-bit)

AMI Only

Yes (16-bit)

Serial Ports

Direct DMA from SPORTs to

External Port (External Memory)

Yes

FIR, IIR, FFT Accelerator

Yes

Watchdog Timer

Yes (176-Lead Package Only)

MediaLB Interface

Automotive Models Only

IDP/PDAP

Yes

UART

DAI (SRU)/DPI (SRU2)

Yes

S/PDIF Transceiver

Yes

SPI

Yes

TWI

SRC Performance4

–128 dB

Thermal Diode

Yes

VISA Support

Yes

Package3

176-Lead LQFP EPAD

100-Lead LQFP EPAD

176-Lead LQFP EPAD

88-Lead LFCSP5

176-Lead LQFP EPAD

100-Lead LQFP EPAD

88-Lead LFCSP5

176-Lead LQFP EPAD

100-Lead LQFP EPAD5

88-Lead LFCSP5

1 See Ordering Guide on Page 70.

2 ROM is factory programmed with latest multichannel audio decoding and post-processing algorithms from Dolby® Labs and DTS®. Decoder/post-processor algorithm

combination support varies depending upon the chip version and the system configurations. Visit www.analog.com for complete information.

3 The 100-lead and 88-lead packages do not contain an external port. The SDRAM controller pins must be disabled when using this package. For more information, see Pin

Function Descriptions on Page 14. The ADSP-21486 processor in the 176-lead package also does not contain a SDRAM controller. For more information, see 176-Lead LQFP_EP

Lead Assignment on page 62.

4 Some models have –140 dB performance. For more information, see Ordering Guide on page 70.

5 Only available up to 400 MHz. See Ordering Guide on Page 70 for details.

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