Silicon Microstructures, Inc. 2001-2017. All rights reserved

+1-(408) 577-0100 | sales@si-micro.com I www.si-micro.com

27

45

131

167

170

175

169

0

61

DOC # 40DS5960.05

SM5221, SM5321 & SM5421 Series

www.si-micro.com

•

Note: There are three differences in the sensor protocol

•

Sending a start-stop condition without any transitions

on the CLK line (no clock pulses in between) created a

communication error for the next communication, even

if the next start condition is correct and the clock pulse

is applied. An additional start condition must be sent,

which results in restoration of proper communication.

6. Diagnostic Features – Status Bits

The sensor offers diagnostic features to ensure robust

system operation. The diagnostic states are indicated by a

transmission of the status of the 2 MSBs of the pressure

high byte data.

•

The restart condition - a falling SDA edge during data

transmission when the CLK clock line is still high -

creates the same situation. The next communication

fails, and an additional start condition must be sent

for correct communication.

•

A failing SDA edge is not allowed between the start

address with the first bit 0, SDA must be held low

from the start condition though the first bit.

Status Bits (2 MSBs of Output Packet)

Symbol

00

Normal operation, good data packet

01

Device in Command Mode (not applicable for normal operation)

Stale data: Data that has already been fetched since the last measurement cycle

11

Diagnostic condition exists

data is actually invalid because the first measurement has not been completed.

•

When the two MSBs are 11, one of the following faults listed

below is indicated:

•

Invalid EEPROM signature

•

Loss of bridge positive or negative

•

Bridge input short

•

Loss of bridge source

•

All diagnostics are detected in the next measurement

cycle and reported in the subsequent data fetch.

Once a diagnostic is reported, the diagnostic status

bits will not change unless both the cause of the

diagnostic is fixed and a power-on-reset is performed.

Page 6