LTC6930 datasheet(20/34 Pages) AD

20 / 34 page

LTC6992-1/LTC6992-2/

LTC6992-3/LTC6992-4

Rev. D

For more information www.analog.com

Basic Operation

The simplest and most accurate method to program the

LTC6992 is to use a single resistor, RSET, between the

SET and GND pins. The design procedure is a four step

process. After choosing the proper LTC6992 version and

POL bit setting, select the NDIV value and then calculate

the value for the RSET resistor.

Alternatively, Analog Devices offers the easy to use

TimerBlox Designer tool to quickly design any LTC6992

based circuit. Use the free TimerBlox LTC6992: PWM

Web-Based Design Tool.

Step 1: Selecting the POL Bit Setting

Most applications will use POL = 0, resulting in a posi-

tive transfer function. However, some applications may

require a negative transfer function, where increasing

VMOD reduces the output duty cycle. For example, if the

LTC6992 is used in a feedback loop, POL = 1 may be

required to achieve negative feedback.

Step 2: Selecting the LTC6992 Version

The difference between the LTC6992 versions is

observed at the endpoints of the duty cycle control range.

Applications that require the output to never stop oscil-

lating should use the LTC6992-2. On the other hand, if

the output should be allowed to rest at GND or V+ (0% or

100% duty cycle), select the LTC6992-1.

The LTC6992-3 and LTC6992-4 clamp the duty cycle at

only one end of the control range, allowing the output to

stop oscillating at the other extreme. If POL = 1 the clamp

will swap from low duty cycle to high, or vice-versa. Refer

to Table 2 and Figure 4 for assistance in selecting the

proper version.

Step 3: Selecting the NDIV Frequency Divider Value

As explained earlier, the voltage on the DIV pin sets the

DIVCODE which determines both the POL bit and the

NDIV value. For a given output frequency, NDIV should be

selected to be within the following range.

62.5kHz

fOUT

≤ NDIV ≤

1MHz

fOUT

(1a)

APPLICATIONS INFORMATION

To minimize supply current, choose the lowest NDIV value

(generally recommended). For faster start-up or decreased

jitter, choose a higher NDIV setting. Alternatively, use

Table 1 as a guide to select the best NDIV value for the

given application.

With POL already chosen, this completes the selection of

DIVCODE. Use Table 1 to select the proper resistor divider

or VDIV/V+ ratio to apply to the DIV pin.

Step 4: Calculate and Select RSET

The final step is to calculate the correct value for RSET

using the following equation.

RSET =

1MHz • 50k

NDIV • fOUT

(1b)

Select the standard resistor value closest to the calculated

value.

Example: Design a PWM circuit that satisfies the following

requirements:

• fOUT = 20kHz

• Positive VMOD to duty cycle response

• Output can reach 100% duty cycle, but not 0%

• Minimum power consumption

Step 1: Selecting the POL Bit Setting

For positive transfer function (duty cycle increases with

VMOD), choose POL = 0.

Step 2: Selecting the LTC6992 Version

To limit the minimum duty cycle, but allow the maximum

duty cycle to reach 100%, choose LTC6992-4. (Note that

if POL = 1 the LTC6992-3 would be the correct choice.)

Step 3: Selecting the NDIV Frequency Divider Value

Choose an NDIV value that meets the requirements of

Equation (1a).

3.125 ≤ NDIV ≤ 50

Potential settings for NDIV include 4 and 16. NDIV = 4 is

the best choice, as it minimizes supply current by using

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