2

EV6R11 KIT

Figure3: EV6R11 PCBSchematic

Schematic Diagram:

Ordering:

Schematic Notes:

This is a demonstration PCB and has been designed for flexibility and ease of use. The

schematic shows all options but does not mean the PCB is configured as such when ordered. The

PCB will be loaded with either the IX6R11S3 16 pin SOIC package (U3) OR the IX6R11S6 18 pin

SOIC package with heat sink tab (U4). The free-wheeling diodes, D2 and D3, are also not included

but can be installed if IGBTs are used.

EV6R11S3

PCB with IX6R11S3 16 pin SOIC IC package

EV6R11S6

PCB with IX6R11S6 18 pin SOIC IC package with heat tab

( Dead Timer )

U2

IXD P630/631

R

1

SU

15

SL

14

TU

13

TL

12

ENAT

6

RE SET (ac tiv e low)

8

S

3

ENAR

2

OUTEN A

7

ENAS

4

T

5

RL

16

RU

17

U3

LGO

1

LS

2

HS

6

HGO

8

HS

9

HI N

12

EN B

13

LI N

14

LS

16

R 15 jum pered

R16 open

D1

UF-1007 DICT

Y1

XM/S M

U1

LM78L05 AC Z

GN D

2

R 5 10K

R 4 10K

ENAS

ENAT

JP1

JP 2

U4

LS

1

LGO

2

LS

4

HS

7

HGO

8

HS

10

HI N

14

EN B

15

LI N

16

LS

18

P1-1 GND

P1 pins

P1-4 Vdd supply line

P1-3 LIN

P1-2 HIN

P1-6 PWM IN

P1-5 ENB active low

P1-7 +5V for IXDB630

R3

1K / 1M

R9

10

P1

C4

.1UF

P1-10 +VCL

P1-11 +VCL

C5 = 22 pF for IXDP631

C5 = 27 pF for IXDP630

R 13 jum pered

R14 open

C5

27p F (2 2pF )

C6

22PF

Q2

IXF H7N 90Q

1

2

3

Q1

IXF H7N 90 Q

1

2

3

R2

5.11

R1

5.11

10 UF 35V

C1 1

.1UF

D3

D2

TP 2

TP 6

1

TP3

TP 1

TP4

1

TP 5

1

C1

10 UF 35V

C9

.1UF 1K V

+

C7

C8

.1UF

P1-8 external 630 drive

P1-9 N/C

C2

.1UF

C3

.01UF

LS GN D

TESTPOINT

Q1-D

TES TPOINT

DC BU S

TESTPOINT

Q2-S

TES TPOINT

P1-12 LS (VCL GND)

P1-13 LS (VCL GND)

Q3

2N 700 0

1

3

Q4

2N 7000

1

3

C12

.1UF

C13

.1UF