MAX5548 datasheet(14/15 Pages) MAXIM

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Power Sequencing

Ensure that the voltage applied to REFIN does not

exceed VDD at any time. If proper power sequencing is

not possible, connect an external Schottky diode

between REFIN and VDD to ensure compliance with the

absolute maximum ratings.

Power-Supply Bypassing and Ground

Management

Digital or AC transient signals on GND create noise at

the analog output. Return GND to the highest-quality

ground plane available. For extremely noisy environ-

ments, bypass REFIN and VDD to GND with 1µF and

0.1µF capacitors with the 0.1µF capacitor as close to

the device as possible. Careful PC board ground layout

minimizes crosstalk between the DAC outputs and

digital inputs.

Dual, 8-Bit, Programmable, 30mA

High-Output-Current DAC

______________________________________________________________________________________

CONTROLLER

DEVICE

DIN(0)

DOUT(0)

SCLK

MAX5548

DIN(1)

DOUT(1)

SCLK

MAX5548

DIN(2)

DOUT(2)

SCLK

MAX5548

Figure 8. Daisy-Chain Configuration

VDD

N.C.

GND

REFIN

N.C.

DOUT/A1

MAX5548

N.C.

THIN QFN (3mm x 3mm)

TOP VIEW

Pin Configuration

Chip Information

PROCESS: BiCMOS

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