LTC7821 datasheet(9/18 Pages) AD

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LTC7060

Rev. A

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OPERATION

sets the PWM pin voltage into this region if the signal

driving the PWM pin goes into a high impedance state.

The EN pin can also be used to keep both BG and TG low

if the high impedance state is not available from the PWM

driving signal. Driving the EN pin low keeps both TG and

BG off, and driving the EN pin high enables TG and BG

switching based on the PWM input. There is an internal

2MΩ pull-down resistor from the EN pin to SGND, keep-

ing the EN default state low if its input is not driven.

Both three-state PWM and EN pin can be used by the

controller IC to perform the Discontinuous Conduction

Mode (DCM) in switching regulator applications.

OUTPUT STAGE

A simplified version of the LTC7060’s output stage is

shown in Figure 2. The BG and TG design are symmetric

and they both have floating gate driver outputs. The pull-

up device is a PMOS with a typical 1.5Ω RDS(ON) and the

pull-down device is a NMOS with a typical 0.8Ω RDS(ON).

The wide driver supply voltage ranging from 4V to 14V

enables the driving of different power MOSFETs, such

as logic level or higher threshold MOSFETs. However,

the LTC7060 is optimized for higher threshold MOSFETs

(e.g. BST-SW = 10V and BGVCC-BGRTN = 10V). The driver

output pull-up and pull-down resistance may increase

with lower driver supply voltage.

Since the power MOSFETs generally account for the

majority of the power loss in a converter, it is important

to turn them on and off quickly, thereby minimizing the

transition time and power loss. The LTC7060’s typical

1.5Ω pull-up resistance and 0.8Ω pull-down resistance

are equivalent to 3A peak pull-up current and 6A peak pull

down current at a 10V driver supply. Both BG and TG can

produce a rapid turn-on transition for the MOSFETs with

capability of driving a 3.3nF load with 18ns rise time.

Furthermore, a strong pull-down on the driver outputs

prevents cross-conduction current. For example, in the

half-bridge configuration shown in Figure 2, when BG

turns the low side power MOSFET off and TG turns the

high side power MOSFET on, the voltage on the SW pin

could rise to VIN very rapidly. This high frequency posi-

tive voltage transient will couple through the CGD capaci-

tance of the low side power MOSFET to the BG pin. If the

BG pin is not held down sufficiently, the voltage on the

BG pin could rise above the threshold voltage of the low

side power MOSFET, momentarily turning it back on. As

a result, both the high side and low side MOSFETs would

be conducting, which would cause significant cross-con-

duction current to flow through the MOSFETs from VIN

to ground, thereby incurring substantial power loss and

potentially damaging the MOSFETs. For this reason, short

PCB traces for the BG and TG pins, which minimize the

parasitic inductances, are recommended.

PROTECTION CIRCUITRY

When using the LTC7060, care must be taken not to

exceed any of the ratings specified in the Absolute

Maximum Ratings section. As an added safeguard, the

LTC7060 incorporates overtemperature shutdown fea-

ture. If the junction temperature reaches approximately

180°C, the LTC7060 will enter thermal shutdown mode

and BG will be pulled to BGRTN; TG will be pulled to SW.

Normal operation will resume when the junction tempera-

ture cools down below 165°C. The overtemperature level

is not production tested. The LTC7060 is guaranteed to

operate below 150°C.

1.5

0.8

1.5

CGD

CGS

CGD

CGS

LTC7060

BST

BGVCC

BGRTN

VIN

HIGH SIDE

POWER MOSFET

LOW SIDE

POWER MOSFET

7060 F02

Figure 2. Simplified Output Stage in Half-Bridge Configuration

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