TMS320F28062F datasheet(98/185 Pages) TI

98 / 185 page

Conversion 0 (A)

13 ADC Clocks

Minimum

7 ADCCLKs

SOC0 (A/B)

ADCCLK

ADCRESULT 0

S/H Window Pulse to Core

ADCCTL1.INTPULSEPOS

ADCSOCFLG 1.SOC0

ADCINTFLG .ADCINTx

SOC2 (A/B)

ADCCLKs

Result 0 (A) Latched

Conversion 0 (B)

13 ADC Clocks

Minimum

7 ADCCLKs

ADCSOCFLG 1.SOC1

ADCSOCFLG 1.SOC2

ADCRESULT 1

Result 0 (B) Latched

Conversion 1 (A)

13 ADC Clocks

ADCRESULT 2

EOC0 Pulse

EOC1 Pulse

EOC2 Pulse

1 ADCCLK

2 ADCCLKs

Analog Input B

SOC0 Sample

B Window

SOC2 Sample

B Window

Analog Input A

SOC0 Sample

A Window

SOC2 Sample

A Window

Figure 8-27. Timing Example for Simultaneous Mode / Late Interrupt Pulse

TMS320F28069, TMS320F28069M, TMS320F28069F, TMS320F28068M, TMS320F28068F

TMS320F28067, TMS320F28066, TMS320F28065, TMS320F28064, TMS320F28063

TMS320F28062, TMS320F28062F

SPRS698I – NOVEMBER 2010 – REVISED FEBRUARY 2021

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TMS320F28062 TMS320F28062F

TMS320F28062F Datasheet(PDF) 98 Page - Texas Instruments

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