SN74LS228

16

× 4 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY

WITH OPEN-COLLECTOR OUTPUTS

SDLS024 – JANUARY 1991 – REVISED SEPTEMBER 1993

POST OFFICE BOX 655303

10–7

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

TEST

CONDITIONS

TYP

MAX

UNIT

tPLH

IRE

↑

IR

N/A

N/A

ns

tPHL

IRE

↓

IR

N/A

N/A

ns

tPLH

ORE

↑

OR

N/A

N/A

ns

tPHL

ORE

↓

OR

N/A

N/A

ns

tPLH

LDCK

↓

IR

25

40

ns

tPHL

LDCK

↑

IR

RL = 2 kΩ,

36

50

ns

tPLH

LDCK

↓

OR

L

,

CL = 15 pF

48

70

ns

tPLH

UNCK

↑

OR

29

45

ns

tPHL

UNCK

↓

OR

28

45

ns

tPLH

UNCK

↑

IR

49

70

ns

tPLH

CLR

↓

IR

36

55

ns

tPHL

CLR

↓

OR

25

40

ns

tPHL

LDCK

↓

Q

34

50

ns

tPLH

UNCK

↑

Q

R

667

Ω

54

80

ns

tPHL

UNCK

↑

Q

RL = 667 Ω,

CL =45 pF

45

70

ns

tPLH

OE

↓

Q

CL = 45 F

21

30

ns

tPHL

OE

↑

Q

20

35

ns

NOTE 3: Load circuit and voltage waveforms are shown in Section 1 of the 1988

TTL Logic Data Book, literature #SDLD001A.