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MCP6C04 Datasheet(PDF) 32 Page - Microchip Technology |
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MCP6C04 Datasheet(HTML) 32 Page - Microchip Technology |
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32 / 54 page ![]() MCP6C04 DS20006179A-page 32 2019 Microchip Technology Inc. 4.0 DEVICE OPERATION This chapter includes additional information on basic operations and major functions. 4.1 Basic Performance 4.1.1 IDEAL PERFORMANCE Figure 4-1 shows the basic circuit; inputs, supplies and output. When the inputs (VIP, VIM, VDD, VSS and VREF) and output (VOUT) are in their specified ranges, and the part is nearly ideal, the output voltage is: EQUATION 4-1: FIGURE 4-1: Basic Circuit. For normal operation, keep: •VIP between VIPL and VIPH •VDM between VDML and VDMH •VREF between VRL and VRH •VOUT between 0.1V to VDD – 0.1V, usually -VOL and VOH are hard limits 4.1.2 ANALOG ARCHITECTURE Figure 4-2 shows the block diagram for these high-side current sense amplifiers, without any details on offset correction. FIGURE 4-2: MCP6C04 Block Diagram. The input (differential) signal is applied to GM1. Due to its architecture, the MCP6C04’s signal inputs are best described by VIP and VDM. The inverting input is then: EQUATION 4-2: The negative feedback loop includes GM2, RM3, RF and RG. These blocks set the DC open-loop gain (AOL) and the nominal differential gain (GDM): EQUATION 4-3: AOL is very high, so the current into RM3 (I1 +I2) is nearly zero. This makes the differential inputs to GM1 and GM2 equal in magnitude and opposite in polarity. Ideally, this gives: EQUATION 4-4: For an ideal part, within the operating ranges, changing VIP, VSS or VDD produces no change in VOUT. VREF shifts VOUT as needed in the design. The different GDM options change GM1, GM2, RF, RG and the internal compensation capacitor. This results in the performance trade-offs highlighted in Table 1. 4.1.3 DC PERFORMANCE 4.1.3.1 DC Voltage Errors Section 1.6, Explanation of DC Error Specifications covers some DC specifications. The input offset error (with temperature coefficients), gain error and nonlinearities are discussed in detail. Plots in Section 2.1, DC Precision and Section 2.2, Other DC Voltages and Currents give useful information. In this data sheet, CMRR is based on changes in VIP (i.e., CMRR = ΔVIP/ΔVOS). This is accurate since VDM is relatively small. This CMRR describes the rejection of errors at the high voltage supply, without any contribution from VDM. VOUT VREF GDMVDM + ≈ Where: GDM = Differential-Mode Gain VIP = Common-Mode Input (and HV supply) VDM = Differential-Mode Input (VIP –VIM) VDD U1 (DUT) MCP6C04 VOUT VSS VIP VIM VREF RF VFG VOUT VREF RM3 GM2 Σ I2 RG VDD VSS GM1 I1 VIP VIM VIM VIP VDM – = AOL GM2RM3 = GDM 1RF RG ⁄ + = VFG VREF – VDM = VOUT VREF GDMVDM + = |
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