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MCP6C04 Datasheet(PDF) 14 Page - Microchip Technology |
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MCP6C04 Datasheet(HTML) 14 Page - Microchip Technology |
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14 / 54 page ![]() MCP6C04 DS20006179A-page 14 2019 Microchip Technology Inc. The impedance at VREF (shown here as RWR) needs to have a magnitude less than 1Ω, for gain accuracy in the signal bandwidth. The magnitude needs to be < 50Ω, when f < 1 MHz, to maintain good stability. 1.6 Explanation of DC Error Specifications 1.6.1 LINEAR RESPONSE MODEL When the inputs and the output are in their normal ranges, and the nonlinear errors are negligible, the out- put voltage (VOUT) is: EQUATION 1-3: VDM is the input voltage. VE is the sum of input offset errors (due to VOS, PSRR, CMRR, CMRR2, TC1, TC2, etc.). gE is the Gain Error (GDM is the nominal gain). 1.6.2 INPUT OFFSET RELATED ERRORS When VDM = 0V, the linear response model for VOUT becomes: EQUATION 1-4: The input offset error (VE) is extracted from input offset measurements (see Section 1.5.1 “VOS Test Circuit”): EQUATION 1-5: We usually assume gE =0, in Equation 1-5, when extracting VE. The result is accurate enough, since gE is so low. VE has several terms, that assume a linear response to changes in VDD, VSS, VIP and VREF. VOS’s dependence on temperature (TA) is a quadratic polynomial (VOS, TC1 and TC2). The aging specs (ΔVOS and ΔTC1) are not included, for simplicity. EQUATION 1-6: 1.6.3 INPUT OFFSET’S COMMON-MODE VOLTAGE NONLINEARITY The input offset error (VE) changes nonlinearly with VIP. Figure 1-12 shows the MCP6C04’s VE vs. VIP, as well as a linear fit line (VE_LIN), that goes through the center point (VC, V2) and has the same slope as the end points. FIGURE 1-12: Input Offset Error vs. Common-Mode Input Voltage. VOUT VREF GDM 1gE + () VDM VE + () + = VOUT VREF GDM 1gE + ()VE + = VE VOUT VREF – GDM 1gE + () --------------------------------- = Where: PSRR, CMRR and CMRR2 are in units of V/V ΔTA is in units of °C VDM =0 VE VOS ΔVDD ΔVSS – PSRR ------------------------------------ ΔVIP CMRR ---------------- ΔVREF CMRR2 ------------------- ΔTATC1 ΔTA 2 TC2 ++ + + + = V1 V3 VE,VE_LIN (V) VIP (V) VIPL VIPH VC V2 VE_LIN VE ΔVE |
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