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MCP6C04 Datasheet(PDF) 34 Page - Microchip Technology |
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MCP6C04 Datasheet(HTML) 34 Page - Microchip Technology |
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34 / 54 page ![]() MCP6C04 DS20006179A-page 34 2019 Microchip Technology Inc. 4.2 Overview of Zero-Drift Operation Figure 4-4 shows a diagram of the MCP6C04; It explains how slow voltage errors at the input are reduced in this archi- tecture (much better VOS, TC1 TC2, CMRR, CMRR2, PSRR and 1/f noise). FIGURE 4-4: MCP6C04 Block Diagram. 4.2.1 BUILDING BLOCKS The Main Amplifiers (GM1 and GM2) are designed for high gain and bandwidth, with a differential topology. The main input pairs (+ and - pins at the top left) are for the higher frequency portion of the input signal. The auxiliary input pairs (+ and - pins at the bottom left) are for the low frequency and high precision portion of the input signal and correct the input offset voltage. Both inputs are added together internally The auxiliary amplifiers (GA1 and GA2), the chopper input switches and the chopper output switches provide a high DC gain to the input signal. DC errors are modulated to higher frequencies and white noise to low frequencies. The low-pass filter reduces high-frequency content, including harmonics of the chopping clock. The output buffer (RM4) converts current to voltage, drives the external load at VOUT and creates a negative feedback loop through RF and RG. RF and RG help set the differential gain. The oscillator runs at fCLK = 50 kHz for the gains of 20 and 50, and at fCLK = 100 kHz for the gain of 100. fCLK is divided by 2, to produce the chopping clock rate (25 kHz and 50 kHz, respectively). The internal LV POR (for VDD –VSS) starts the part in a known good state, protecting against power supply brown-outs. The internal HV POR (for VIP –VSS) ensures protection of the low voltage circuitry, as well as proper functioning. 4.2.2 CHOPPING ACTION Figure 4-5 shows the amplifier connections for the first phase of the Chopping Clock and Figure 4-6 shows them for the second phase. The slow voltage errors alternate in polarity, making the average error small. FIGURE 4-5: First Chopping Clock Phase; Simplified Diagram. VIP VIM GM1 GA1 Chopper Input Switches Chopper Output Switches Low-Pass Filter RM4 VOUT VREF GM2 GA2 Chopper Input Switches Chopper Output Switches Low-Pass Filter RG RF EMI Filters DM Clamps EMI Filter VFG VIP VIM GA1 Low- Pass Filter VREF VFG GA2 Low- Pass Filter |
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