HD49330AF datasheet(8/20 Pages) RENESAS

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HD49330AF/AHF

Rev.1.0, Apr.05.2004, page 8 of 19

6. ADC Digital Output Control Function

The ADC digital output includes the functions output enable, code conversion, and test mode. Tables 3, 4 and 5

show the output functions and the codes.

Table 3

ADC Digital Output Functions

Operating Mode

ADC Digital Output

Low-power wait state

Output Hi-Z

Normal operation

Pre-blanking

Normal operation

Pre-blanking

Test mode

Hi-Z

Same as in table 4.

D11 is inverted in table 4.

D10 to D0 are inverted in table 4.

D11 to D0 are inverted in table 4.

Output code is set up to Clamp Level.

Same as in table 5.

D11 is inverted in table 5.

D10 to D0 are inverted in table 5.

D11 to D0 are inverted in table 5.

Output code is set up to Clamp Level.

Notes:

1. STBY, TEST, LINV, and MINV are set by register.

2. Mode setting for the OEB and the PBLK are done by external input pins.

3. The polarity of the PBLK pin when the register setting is SPinv is low.

D11 D10

Table 4

ADC Output Code

Output Pin

Output

codes

Steps

2047

2048

4092

4093

4094

4095

D10

D11

Table 5

ADC Output Code (TEST1)

Output Pin

Output

codes

Steps

2047

2048

4092

4093

4094

4095

D10

D11

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