VT82C686B
Revision 1.71 June 9, 2000
-28-
Register Overview
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Table 3. Registers
Legacy I/O Registers
Port
Master DMA Controller Registers
Default Acc
00
Channel 0 Base & Current Address
RW
01
Channel 0 Base & Current Count
RW
02
Channel 1 Base & Current Address
RW
03
Channel 1 Base & Current Count
RW
04
Channel 2 Base & Current Address
RW
05
Channel 2 Base & Current Count
RW
06
Channel 3 Base & Current Address
RW
07
Channel 3 Base & Current Count
RW
08
Status / Command
RW
09
Write Request
WO
0A
Write Single Mask
WO
0B
Write Mode
WO
0C
Clear Byte Pointer FF
WO
0D
Master Clear
WO
0E
Clear Mask
WO
0F
Read / Write Mask
RW
Port
Master Interrupt Controller Regs
Default Acc
20
Master Interrupt Control
—
*
21
Master Interrupt Mask
—
*
20
Master Interrupt Control Shadow
—
RW
21
Master Interrupt Mask Shadow
—
RW
* RW if shadow registers are disabled
Port
Timer/Counter Registers
Default Acc
40
Timer / Counter 0 Count
RW
41
Timer / Counter 1 Count
RW
42
Timer / Counter 2 Count
RW
43
Timer / Counter Control
WO
Port
Keyboard Controller Registers
Default Acc
60
Keyboard Controller Data
RW
61
Misc Functions & Speaker Control
RW
64
Keyboard Ctrlr Command / Status
RW
Port
CMOS / RTC / NMI Registers
Default Acc
70
CMOS Memory Address & NMI Disa
WO
71
CMOS Memory Data (128 bytes)
RW
72
CMOS Memory Address
RW
73
CMOS Memory Data (256 bytes)
RW
74
CMOS Memory Address
RW
75
CMOS Memory Data (256 bytes)
RW
NMI Disable is port 70h (CMOS Memory Address) bit-7.
RTC control occurs via specific CMOS data locations (0-Dh).
Ports 72-73 may be used to access all 256 locations of CMOS.
Ports 74-75 may be used to access CMOS if the internal RTC
is disabled.
Legacy I/O Registers (continued)
Port
DMA Page Registers
Default Acc
87
DMA Page – DMA Channel 0
RW
83
DMA Page – DMA Channel 1
RW
81
DMA Page – DMA Channel 2
RW
82
DMA Page – DMA Channel 3
RW
8F
DMA Page – DMA Channel 4
RW
8B
DMA Page – DMA Channel 5
RW
89
DMA Page – DMA Channel 6
RW
8A
DMA Page – DMA Channel 7
RW
Port
System Control Registers
Default Acc
92
System Control
RW
Port
Slave Interrupt Controller Regs
Default Acc
A0
Slave Interrupt Control
—
*
A1
Slave Interrupt Mask
—
*
A0
Slave Interrupt Control Shadow
—
RW
A1
Slave Interrupt Mask Shadow
—
RW
* RW accessible if shadow registers are disabled
Port
Slave DMA Controller Registers
Default Acc
C0
Channel 0 Base & Current Address
RW
C2
Channel 0 Base & Current Count
RW
C4
Channel 1 Base & Current Address
RW
C6
Channel 1 Base & Current Count
RW
C8
Channel 2 Base & Current Address
RW
CA
Channel 2 Base & Current Count
RW
CC
Channel 3 Base & Current Address
RW
CE
Channel 3 Base & Current Count
RW
D0
Status / Command
RW
D2
Write Request
WO
D4
Write Single Mask
WO
D6
Write Mode
WO
D8
Clear Byte Pointer FF
WO
DA
Master Clear
WO
DC
Clear Mask
WO
DE
Read / Write Mask
RW
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