ADRF6821 datasheet(50/61 Pages) AD

50 / 61 page

ADRF6821

Data Sheet

Rev. A | Page 50 of 61

Address: 0x1208, Reset: 0x00, Name: MOD_L

MOD2 w or d.

[ 7 :0 ] M O D 2 [ 7 :0 ][ 7 :0 ] ( R/W )

Table 56. Bit Descriptions for MOD_L

Bits

Bit Name

Settings

Description

Reset

Access

[7:0]

MOD2, Bits[7:0]

MOD2 word; lower bits

0x0

R/W

Address: 0x1209, Reset: 0x00, Name: MOD_H

MOD2 w or d.

[ 7 : 6 ] RES ERV ED

[ 5 :0 ] M O D 2 [ 7 :0 ][ 1 3 :8 ] ( R/W )

Table 57. Bit Descriptions for MOD_H

Bits

Bit Name

Settings

Description

Reset

Access

[7:6]

RESERVED

Reserved

0x0

[5:0]

MOD2, Bits[13:8]

MOD2 word; upper bits

0x0

R/W

Address: 0x120B, Reset: 0x01, Name: SYNTH

Enable Feedbac k Div ider

Pres c aler Selec t

1: Enable 2x Pres c aler.

0: Dis able 2x Pres c aler.

[ 7 :2 ] RES ERV ED

[ 0 ] EN _FBD IV ( R/W )

[ 1 ] P RE_S EL ( R/W )

Table 58. Bit Descriptions for SYNTH

Bits

Bit Name

Settings

Description

Reset

Access

[7:2]

RESERVED

Reserved.

0x0

PRE_SEL

Prescaler Select

0x0

R/W

Disable 2× Prescaler

Enable 2× Prescaler

EN_FBDIV

Enable Feedback Divider

0x1

R/W

Address: 0x120C, Reset: 0x03, Name: R_DIV

R Divider Word

[7] RESERVED

[6:0] R_DIV (R/W)

Table 59. Bit Descriptions for R_DIV

Bits

Bit Name

Settings

Description

Reset

Access

RESERVED

Reserved.

0x0

[6:0]

R_DIV

R Divider Word. Lower 8 bits of 10-bit reference R divider word.

0x3

R/W

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