| Electronic Components Datasheet Search |
|
ADRF6821 Datasheet(PDF) 57 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADRF6821 Datasheet(HTML) 57 Page - Analog Devices |
|
57 / 61 page ![]() Data Sheet ADRF6821 Rev. A | Page 57 of 61 Address: 0x1414, Reset: 0x02, Name: LO_CNTRL8 Recommended register for use to control the LO path from a single spot. By programming this register, the individual blocks enable and configuration bits are set appropriately. Mix Outp ut Enab le Outp ut Path Divid e Ratio 10000: /16 . 1000: /8 . 100: /4 . 10 : /2 . 1: /1. LO Path Outp ut Enab le Use Exte rnal LO Path 0 0 1 1 2 0 3 0 4 0 5 0 6 0 7 0 [ 7 ] M IX _O E ( R/W ) [ 4 :0 ] O UT _D IV RAT IO ( R/W ) [ 6 ] LO _O E ( R/W ) [ 5 ] US EEX T _LO I ( R/W ) Table 80. Bit Descriptions for LO_CNTRL8 Bits Bit Name Settings Description Reset Access 7 MIX_OE Mix Output Enable. When disabled (OE = 0), mute = 1, or DIVRATIO = 0, the mute depth is selected via GEN_MUTE_DEPTH. Note that the mute depth can be artificially restricted if the other output path is still enabled and relies on a shared branch of the LO chain. 0x0 R/W 6 LO_OE LO Path Output Enable. When disabled (OE = 0), MUTE = 1, or DIVRATIO = 0, the mute depth is selected via GEN_MUTE_DEPTH. Note that the mute depth can be artificially restricted if the other output path is still enabled and relies on a shared branch of the LO chain. 0x0 R/W 5 USEEXT_LOI Use External LO Path. 0x0 R/W [4:0] OUT_DIVRATIO Output Path Divide Ratio. Sets the divide ratio from the fundamental VCOs or the external input path to the output paths. Nominally, the internal VCO range is 4 GHz to 8 GHz. 0x2 R/W 0 Mute 1 /1. 10 /2. 100 /4. 1000 /8. 10000 /16. Address: 0x1541, Reset: 0x00, Name: FRAC2_L_SLAVE FRAC2 Wor d Double Buffer ed Value 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 [ 7 : 0 ] FRAC2 _S LV [ 7 : 0 ] ( R) Table 81. Bit Descriptions for FRAC2_L_SLAVE Bits Bit Name Settings Description Reset Access [7:0] FRAC2_SLV, Bits[7:0] FRAC2 Word Double Buffered Value 0x0 R Address: 0x1542, Reset: 0x00, Name: FRAC2_H_SLAVE FRAC2 Wor d Double Buffer ed Value 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 [ 7 : 6 ] RES ERV ED [ 5 : 0 ] FRAC2 _S LV [ 1 3 : 8 ] ( R) Table 82. Bit Descriptions for FRAC2_H_SLAVE Bits Bit Name Settings Description Reset Access [7:6] RESERVED Reserved 0x0 R [5:0] FRAC2_SLV, Bits[13:8] FRAC2 Word Double Buffered Value 0x0 R |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |