| Electronic Components Datasheet Search |
|
MCP4716 Datasheet(PDF) 52 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
MCP4716 Datasheet(HTML) 52 Page - Microchip Technology |
|
52 / 70 page ![]() MCP47A1 DS25154A-page 52 2012 Microchip Technology Inc. 8.6 Design Considerations 8.6.1 POWER SUPPLY CONSIDERATIONS (NOISE) Inductively-coupled AC transients and digital switching noise can degrade the input and output signal integrity, potentially masking the MCP47A1’s performance. Careful board layout minimizes these effects and increases the Signal-to-Noise Ratio (SNR). Multi-layer boards utilizing a low-inductance ground plane, isolated inputs, isolated outputs and proper decoupling are suggested. Particularly harsh environments may require shielding of critical signals. The device’s power sources (VDD and VREF) should be as clean as possible. Any noise induced on the VDD and VREF signals can affect the DAC performance. Separate digital and analog ground planes are recommended. Typical applications require a bypass capacitor in order to filter high-frequency noise on the VDD and VREF sig- nals. The noise can be induced onto the power supply’s traces or as a result of changes on the DAC output. The bypass capacitor helps to minimize the effect of these noise sources on signal integrity. Figure 8-8 illustrates an appropriate bypass strategy. In this example, the recommended bypass capacitor value is 0.1 µF. This capacitor should be placed as close to the device power pin (VDD) as possible (within 4mm). Separate digital and analog ground planes are recommended. In this case, the VSS pin and the ground pins of the VDD capacitors should be terminated to the analog ground plane and VDD and VSS should reside on the analog plane. Figure 8-9 shows an example of using two bypass capacitors (a 10 µF tantalum capacitor and a 0.1 µF ceramic capacitor) in parallel on the VDD line. These capacitors should be placed as close to the VDD pin as possible (within 4 mm). If the application circuit has separate digital and analog power supplies, the VDD and VSS pins of the device should reside on the analog plane. FIGURE 8-8: Typical Microcontroller Connections. FIGURE 8-9: Example MCP47A1 Circuit. Note: Breadboards and wire-wrapped boards are not recommended. VDD VDD VSS VSS 0.1 µF 0.1 µF SCL SDA VOUT VREF Analog VDD 1 2 3 6 4 VDD SCL SDA VSS VOUT 5 R1 R2 To MCU R1 and R2 are I2C pull-up resistors: R1 and R2: 5k - 10 k for f SCL = 100 kHz to 400 kHz C1: 0.1 µF capacitor Ceramic C2: 10 µF capacitor Tantalum C3: ~ 0.1 µF Optional to reduce noise in VOUT pin. C4: 0.1 µF capacitor Ceramic C5: 10 µF capacitor Tantalum C2 C1 C3 Optional Output VREF C4 Optional VREF C5 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |