EDSTRG44PLCC datasheet(43/78 Pages) TI

43 / 78 page

GLOSSARY/SYMBOLS, TERMS, AND DEFINITIONS

1–35

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• HOUSTON, TEXAS 77251–1443

R/W:

Read or Write operation. Goes high at the beginning of read operations and low during write operations. This

line is active during both internal and external accesses.

RAM:

Random-access memory

ratiometric conversion:

An analog-to-digital conversion in which the conversion value is a ratio of the VREF source

to the analog input. As VREF is increased, the input voltage needed to give a certain conversion value changes;

however, all conversion values keep the same relationship to VREF.

read:

A memory operation whereby data is output from a desired address location

read-only memory (ROM):

A memory in which the contents are not intended to be altered during normal operation.

NOTE: Unless otherwise qualified, the term “read-only memory” implies that the contents are determined by its

structure and are unalterable.

referred timer:

The timer that a PACT command uses for time comparisons. This is the last timer defined in the

PACT command/definition area before the command was encountered, or if no timer has been defined, it is the

least significant 16 bits of the hardware timer.

The first 128 or 256 bytes of memory that can be accessed by the majority of the instructions

relative-addressing mode:

An operating mode in which operands and code produce an absolute address at some

distance from the current location

RESET pin:

A pin that, when held low, starts hardware initialization and ensures an orderly software startup. If the

MC pin is low when the RESET signal returns high, then the processor enters the microcomputer mode. If the MC

pin is high when the RESET signal returns high, then it enters the microprocessor mode.

ROM security:

Inhibits the reading of the ROM using any programmer

serial communications interface (SCI):

Referred to as SCI1 or SCI2. SCI1 is a built-in serial interface that can

be programmed to be asynchronous or isosynchronous. SCI2 is a built-in serial interface that can only be pro-

grammed to be asynchronous. Many timing, data format, and protocol factors are programmable and controlled

by the SCI module in operation.

serial peripheral interface (SPI):

A built-in serial interface that facilitates communication between networked mas-

ter and slave CPUs. As in the SCI, the SPI is set up by software; from then on, the CPU takes no part in timing,

data format, or protocol.

signed integer:

A number system used to express positive and negative integers

SPI:

Serial Peripheral Interface module

stack:

The part of the register file used as last-in, first-out memory for temporary-variable storage. The stack is used

during interrupts and calls to store the current program status. The area occupied by the stack is determined by

the stack pointer and by the application program.

stack pointer (SP):

An 8-bit CPU register that points to the last entry or top of the stack. The SP is incremented

automatically before data is pushed onto the stack and decremented after data is popped from the stack.

standby RAM:

Random-access memory which is powered through a separate power pin to protect the memory

against power failures on the main power pin.

STANDBY mode:

A power reduction mode in which the CPU stops processing, but the on-chip oscillator remains

active. Timers remain active and can cause the CPU to exit the STANDBY mode.

EDSTRG44PLCC Datasheet(PDF) 43 Page - Texas Instruments

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