DA7400 datasheet(60/135 Pages) DIALOG

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DA7400

High Performance Stereo Codec

Final

Datasheet

Revision 3.0

03-Jul-2020

CFR0011-120-00

60 of 135

PLLD_IRQ_MASK register. By default, all the PLL events are masked and do not toggle the nIRQ

pin.

15.3.6

PLL Calculation Example

Follow the steps outlined below to configure the PLL with the following setup:

● 35 MHz MCLK as input clock

● DAI in Master mode

● SSR = 192 kHz

● DAI sample rate = 48 kHz

Configuration steps

1. Set CLK_SEL = 0, to set the input clock as MCLK.

2. Set bits INDIV = 0x5, to divide the incoming clock by 8 to get a ref_clk in the range of 2.5 MHz to

5 MHz.

3. Set bits PLL_SRM_MODE = 0x0 to disable SRM (DAI in Master mode).

4. Calculate FBDIV (when DAI rate is 48 kHz, the required system clock is 98.304 MHz, see

Section 15.3.3):

FBDIV = (sys_clk * 2) ÷ ref_clk

=> FBDIV (98.304 MHz * 2) ÷ (35 MHz / 8)

=> FBDIV = 44.93897143

5. Multiply fractional part => 0.93897143 * 213 = 7692 (decimal).

6. Convert fractional multiplication to binary => 0x1E0C.

7. Write fractional values to registers:

PLLD_FBDIV_FRAC_B0 = 0x0C.

PLLD_FBDIV_FRAC_B1 = 0x1E.

8. Write integer value to register

PLLD_FBDIV_INTEG = 44 (decimal) = 0x2C.

15.4 Audio Processing Unit

The audio sequencer controls the enabling and disabling of the APU, see Section 9. Program the

registers in the APU before switching the set.

15.4.1

APU Gain Control

The APU gain control is profile dependent and is typically used to control the output to the

headphones. The APU_USER_GAIN_C0_DB and APU_USER_GAIN_C1_DB provide gain control in

1 dB steps for Channels 0 and 1. The APU_USER_GAIN_C0_FINE and

APU_USER_GAIN_C1_FINE provide finer gain control in 0.0625 dB steps for Channels 0 and 1.

Changes to the APU gain are linearly ramped at the rate set in the APU_GAIN_RATE register.

15.4.2

Reading and Writing Memories

The two SRAM program memories, PROG-0 and PROG-1, and the data memory can be written to

whenever the device is in the STANDBY or ACTIVE state, see Section 9.6. The memory can be read

and written to directly a byte at a time or indirectly a word (4 bytes) at a time via the mailbox for

atomic reads and writes.

DA7400 Datasheet(PDF) 60 Page - Dialog Semiconductor

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