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LTM8049 Datasheet(PDF) 9 Page - Analog Devices

Part # LTM8049
Description  Ultrathin Low VIN, 2A Buck-Boost 關Module Regulator
PDF  22 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM8049 Datasheet(HTML) 9 Page - Analog Devices

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LTM4693
9
Rev. 0
For more information www.analog.com
APPLICATIONS INFORMATION
The front page shows a typical LTM4693 application
circuit. This Applications Information section serves as
a guideline of selecting external components for typi-
cal applications. The examples and equations in this
section assume continuous conduction mode unless
otherwise specified.
VIN UVLO THRESHOLD
The VIN threshold is internally set to a typical value of
1.7V for turn-on and 1.6V for turn-off when RUN/UVLO
is connected to VIN. The VIN UVLO can be adjusted to a
higher threshold voltage with a resistor network on RUN/
UVLO according to Equation 4 and Equation 5.
VTURN(ON) =1.2V •(1+R1/R2)
(4)
The accurate RUN/UVLO pin threshold has 100mV of hys-
teresis provided internally.
VTURN(OFF) =1.1V •(1+R1/R2)
(5)
SETTING THE SWITCHING FREQUENCY
The operating frequency of the LTM4693 is optimized
to achieve the compact package size and the minimum
output ripple voltage while keeping high efficiency. The
default operating frequency is internally set to 1MHz by
an internal resistor. In most applications, no additional
frequency adjusting is required.
If any operating frequency higher than 1MHz is required
by application, the operating frequency can be adjusted
by adding a resistor RT between FREQ pin and GND. The
RT resistor required to set a specific switching frequency
can be calculated with Equation 7.
RT(kΩ)=
110
fSW(MHz)−1
(7)
The programmable operating frequency range is from
1MHz to 4MHz. The typical value of RT and the switching
frequency is shown as Table 1.
Table 1. RT Value for Common Switching Frequencies
fSW
RT
1.0MHz
OPEN
2.0MHz
110kΩ
3.0MHz
55kΩ
4.0MHz
36.5kΩ
The LTM4693 can be synchronized to an external clock
applied to the MODE/SYNC pin. The frequency of the
external clock must be higher than the internal oscillator
frequency as set by the FREQ pin. In order to accom-
modate the ±20% possible variation in the oscillator fre-
quency, the RT resistor should be chosen to set the inter-
nal oscillator frequency between 25% to 50% below the
synchronization frequency. For example, to synchronize
to an external 2.5MHz clock, RT should be selected to set
the internal oscillator at 1.9MHz or lower.
OUTPUT VOLTAGE PROGRAMMING
The PWM controller has an internal 1V reference voltage.
As shown in the Block Diagram, a 60.4k internal feedback
resistor connects from VFB to VOUT. Adding a resistor
RFB from FB pin to GND pin programs the output voltage
(Equation 6).
VOUT =1.0V •
60.4k
+RFB
RFB
(6)
LTM4693
VIN
RUN/UVLO
4693 F01
R1
R2
Figure 1. Circuit to Set VIN UVLO



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