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MCIMX6DP6AYM2AB Datasheet(PDF) 39 Page - NXP Semiconductors

Part # MCIMX6DP6AYM2AB
Description  i.MX 6DualPlus/6QuadPlus Applications Processors Industrial Products
PDF  160 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MCIMX6DP6AYM2AB Datasheet(HTML) 39 Page - NXP Semiconductors

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Electrical Characteristics
i.MX 6DualPlus/6QuadPlus Applications Processors Industrial Products, Rev. 3, 11/2018
NXP Semiconductors
39
4.6.3
DDR I/O DC Parameters
The DDR I/O pads support LPDDR2 and DDR3/DDR3L operational modes.
To date LPDDR2 has not been fully validated or supported in the BSP. For further details contact your local
NXP representative.
Table 21. GPIO I/O DC Parameters
Parameter
Symbol
Test Conditions
Min
Max
Unit
High-level output voltage1
1 Overshoot and undershoot conditions (transitions above OVDD and below GND) on switching pads must be held below 0.6 V,
and the duration of the overshoot/undershoot must not exceed 10% of the system clock cycle. Overshoot/ undershoot must be
controlled through printed circuit board layout, transmission line impedance matching, signal line termination, or other methods.
Non-compliance to this specification may affect device reliability or cause permanent damage to the device.
Voh
Ioh = -0.1 mA (DSE2 = 001, 010)
Ioh = -1 mA
(DSE = 011, 100, 101, 110, 111)
2 DSE is the Drive Strength Field setting in the associated IOMUX control register.
OVDD – 0.15
—
V
Low-level output voltage1
Vol
Iol = 0.1 mA (DSE2 = 001, 010)
Iol = 1mA
(DSE = 011, 100, 101, 110, 111)
—0.15
V
High-Level DC input voltage1, 3
3 To maintain a valid level, the transition edge of the input must sustain a constant slew rate (monotonic) from the current DC
level through to the target DC level, Vil or Vih. Monotonic input transition time is from 0.1 ns to 1 s.
Vih
—
0.7
× OVDD
OVDD
V
Low-Level DC input voltage1, 3
Vil
—
0
0.3
× OVDD V
Input Hysteresis
Vhys
OVDD = 1.8 V
OVDD = 3.3 V
0.25
—
V
Schmitt trigger VT+3, 4
4 Hysteresis of 250 mV is guaranteed over all operating conditions when hysteresis is enabled.
VT+
—
0.5
× OVDD
—
V
Schmitt trigger VT–3, 4
VT–
—
—
0.5
× OVDD V
Input current (no pull-up/down)
Iin
Vin = OVDD or 0
-1
1
μA
Input current (22 k
Ω pull-up)
Iin
Vin = 0 V
Vin = OVDD
—212
1
μA
Input current (47 k
Ω pull-up)
Iin
Vin = 0 V
Vin = OVDD
—100
1
μA
Input current (100 k
Ω pull-up)
Iin
Vin = 0 V
Vin= OVDD
—48
1
μA
Input current (100 k
Ω pull-down)
Iin
Vin = 0 V
Vin = OVDD
—1
48
μA
Keeper circuit resistance
Rkeep
Vin = 0.3 x OVDD
Vin = 0.7 x OVDD
105
175
k
Ω



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