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MAX22005 Datasheet(PDF) 10 Page - Maxim Integrated Products |
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MAX22005 Datasheet(HTML) 10 Page - Maxim Integrated Products |
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10 / 47 page  Electrical Characteristics (continued) (VAVDD = VDVDD = 3.3V, VHVDD = +15V, VHVSS = -15V, Reference Source = Internal Reference, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA= +25ºC.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Positive High-Voltage Supply VHVDD 5 24 V Negative High-Voltage Supply VHVSS -24 -5 V High-Voltage Supply VHV VHVDD - VHVSS 10 48 V DVDD POR Threshold VDVDD_POR Voltage rising 1.5 V HVDD-HVSS Undervoltage Threshold Voltage rising 1.5 V Analog Supply Current IAVDD ADC sample rate is 11.52ksps, ADC mode is Continuous Single-Cycle. Single- ended AI1–AI12 at AGND 4.5 mA Digital Supply Current IDVDD ADC sample rate is 11.52ksps, ADC mode is Continuous Single-Cycle. Single- ended AI1–AI12 at AGND 1.8 mA High-Voltage Supply Current IHV ADC sample rate is 11.52ksps, ADC mode is Continuous Single-Cycle. Single- ended AI1–AI12 at AGND 2.5 mA Total Power ADC sample rate is 11.52ksps, ADC mode is Continuous Single-Cycle. Single- ended AI1–AI12 at AGND 95.8 mW AI1–AI12 at AGND, VHVDD = 5V and VHVSS = -5V, all inputs are on 45.8 TIMING CHARACTERISTICS SCLK Frequency fSCLK All SPI transactions 30 MHz SCLK Clock Period tCP All SPI transactions 33 ns SCLK Pulse-Width High tCH All SPI transactions 13 ns SCLK Pulse-Width Low tCL All SPI transactions 13 ns CS Fall Setup Time tCSS0 CS falling edge to 1st SCLK rising edge setup time 7 ns CS Fall Hold Time tCSH0 SCLK rising edge to CS falling edge hold time 0 ns CS Rise Hold Time tCSH1 SCLK falling edge to CS rising edge hold time 3 ns CS Pulse-Width High tCSW Minimum CS pulse-width high 150 ns SDI Setup Time tDS SDI setup time to SCLK rising edge 5 ns SDI Hold Time tDH SDI hold time after SCLK rising edge 5 ns SDO Transition Time tDOT SDO transition valid after SCLK falling edge 20 ns SDO Hold Time tDOH Output remains valid after falling edge of SCLK 2 ns SDO Disable Time tDOD CS rising edge to SDO disable, CLOAD = 20pF 25 ns Note 1: Limits are 100% tested at TA = +25°C, unless otherwise noted. Limits over the operating temperature range and relevant supply-voltage range are guaranteed by design and characterization. MAX22005 12-Channel Factory-Calibrated Configurable Industrial-Analog Input www.maximintegrated.com Maxim Integrated | 10 |
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