MPC8548EEC datasheet(65/151 Pages) NXP

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MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 10

Freescale Semiconductor

High-Speed Serial Interfaces (HSSI)

16 High-Speed Serial Interfaces (HSSI)

The device features one Serializer/Deserializer (SerDes) interface to be used for high-speed serial

interconnect applications. The SerDes interface can be used for PCI Express and/or serial RapidIO data

transfers.

This section describes the common portion of SerDes DC electrical specifications, which is the DC

requirement for SerDes reference clocks. The SerDes data lane’s transmitter and receiver reference circuits

are also shown.

16.1

Signal Terms Definition

The SerDes utilizes differential signaling to transfer data across the serial link. This section defines terms

used in the description and specification of differential signals.

Figure 38 shows how the signals are defined. For illustration purpose, only one SerDes lane is used for the

description. The figure shows a waveform for either a transmitter output (SD_TX and SD_TX) or a

receiver input (SD_RX and SD_RX). Each signal swings between A volts and B volts where A > B.

Using this waveform, the definitions are as follows. To simplify the illustration, the following definitions

assume that the SerDes transmitter and receiver operate in a fully symmetrical differential signaling

environment.

•

Single-ended swing

The transmitter output signals and the receiver input signals SD_TX, SD_TX, SD_RX and SD_RX

each have a peak-to-peak swing of A – B volts. This is also referred as each signal wire’s

single-ended swing.

•

Differential output voltage, VOD (or differential output swing):

The differential output voltage (or swing) of the transmitter, VOD, is defined as the difference of

the two complimentary output voltages: VSD_TX –VSD_TX. The VOD value can be either positive

or negative.

•

Differential input voltage, VID (or differential input swing):

The differential input voltage (or swing) of the receiver, VID, is defined as the difference of the two

complimentary input voltages: VSD_RX –VSD_RX. The VID value can be either positive or

negative.

•

Differential peak voltage, VDIFFp

The peak value of the differential transmitter output signal or the differential receiver input signal

is defined as differential peak voltage, VDIFFp = |A – B| volts.

•

Differential peak-to-peak, VDIFFp-p

Because the differential output signal of the transmitter and the differential input signal of the

receiver each range from A – B to –(A – B) volts, the peak-to-peak value of the differential

transmitter output signal or the differential receiver input signal is defined as differential

peak-to-peak voltage, VDIFFp-p = 2 × VDIFFp = 2 × |(A – B)| volts, which is twice of differential

swing in amplitude, or twice of the differential peak. For example, the output differential

peak-to-peak voltage can also be calculated as VTX-DIFFp-p = 2 × |VOD|.

•

Common mode voltage, Vcm

The common mode voltage is equal to one half of the sum of the voltages between each conductor

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