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10 Power Supply Recommendations

The OPAx182 is specified for operation from 4.5 V to 36 V (±2.25 V to ±18 V); many specifications apply from

–40°C to +125°C. The Typical Characteristics presents parameters that can exhibit significant variance with

regard to operating voltage or temperature.

CAUTION

Supply voltages larger than 40 V can permanently damage the device (see the Aboslute Maximum

Ratings).

Place 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or

high-impedance power supplies. For more detailed information on bypass capacitor placement, see the Layout

section.

11 Layout

11.1 Layout Guidelines

For best operational performance of the device, use good PCB layout practices, including:

• Noise can propagate into analog circuitry through the power pins of the circuit as a whole and the op amp

itself. Bypass capacitors reduce the coupled noise by providing low-impedance power sources local to the

analog circuitry.

– Connect low-ESR, 0.1-µF ceramic bypass capacitors between each supply pin and ground, placed as

close as possible to the device. A single bypass capacitor from V+ to ground is applicable for single-

supply applications.

• Separate grounding for analog and digital portions of circuitry is one of the simplest and most effective

methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes.

A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital

and analog grounds paying attention to the flow of the ground current. For more detailed information, see The

PCB is a component of op amp design.

• To reduce parasitic coupling, run the input traces as far away as possible from the supply or output traces. If

these traces cannot be kept separate, crossing the sensitive trace perpendicular is much better as opposed

to in parallel with the noisy trace.

• Place the external components as close as possible to the device. As illustrated in Figure 11-1, keep RF and

RG close to the inverting input to minimize parasitic capacitance.

• Keep the length of input traces as short as possible. Always remember that the input traces are the most

sensitive part of the circuit.

• Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce

leakage currents from nearby traces that are at different potentials.

• Clean the PCB following board assembly.

• Any precision integrated circuit may experience performance shifts due to moisture ingress into the plastic

package. Following any aqueous PCB cleaning process, bake the PCB assembly to remove moisture

introduced into the device packaging during the cleaning process. A low temperature, post cleaning bake

at 85°C for 30 minutes is sufficient for most circumstances.

For the lowest offset voltage, avoid temperature gradients that create thermoelectric (Seebeck) effects in the

thermocouple junctions formed from connecting dissimilar conductors.

• Use low thermoelectric-coefficient conditions (avoid dissimilar metals).

• Thermally isolate components from power supplies or other heat sources.

• Shield operational amplifier and input circuitry from air currents, such as cooling fans.

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OPA182, OPA2182, OPA4182

SBOS936D – DECEMBER 2019 – REVISED DECEMBER 2021

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